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Use Verilator for benchmarks by default
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parent
17f75c635b
commit
4d18836bfc
2 changed files with 2 additions and 3 deletions
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@ -28,8 +28,7 @@ PORT_CFLAGS = -g -mabi=$(ABI) -march=$(ARCH) -static -falign-functions=16 \
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all: $(work_dir)/coremark.bare.riscv.elf.memfile
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run: $(work_dir)/coremark.bare.riscv.elf.memfile
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# time wsim rv$(XLEN)gc coremark --sim verilator 2>&1 | tee $(work_dir)/coremark.sim.log
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time wsim ${CONFIG} coremark 2>&1 | tee $(work_dir)/coremark.sim.log
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time wsim --sim verilator ${CONFIG} coremark 2>&1 | tee $(work_dir)/coremark.sim.log
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$(work_dir)/coremark.bare.riscv.elf.memfile: $(work_dir)/coremark.bare.riscv
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riscv64-unknown-elf-objdump -D $< > $<.elf.objdump
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@ -43,7 +43,7 @@ sim: sim_build_memfile sim_run speed
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# launches sim to simulate tests on wally
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sim_run:
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wsim rv32gc embench --params "BPRED_LOGGER=1\'b1"
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wsim --sim verilator rv32gc embench --params "BPRED_LOGGER=1\'b1"
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# builds the objdump based on the compiled c elf files
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objdump:
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