mirror of
https://github.com/openhwgroup/cvw.git
synced 2025-04-24 22:07:12 -04:00
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
This commit is contained in:
commit
4d3b24eb4c
1 changed files with 9 additions and 3 deletions
12
sim/Makefile
12
sim/Makefile
|
@ -1,5 +1,5 @@
|
||||||
|
|
||||||
all: riscoftests memfiles coveragetests deriv
|
all: riscoftests memfiles coveragetests deriv benchmarks
|
||||||
# *** Build old tests/imperas-riscv-tests for now;
|
# *** Build old tests/imperas-riscv-tests for now;
|
||||||
# Delete this part when the privileged tests transition over to tests/wally-riscv-arch-test
|
# Delete this part when the privileged tests transition over to tests/wally-riscv-arch-test
|
||||||
# DH: 2/27/22 temporarily commented out imperas-riscv-tests because license expired
|
# DH: 2/27/22 temporarily commented out imperas-riscv-tests because license expired
|
||||||
|
@ -54,7 +54,7 @@ riscoftests:
|
||||||
wallyriscoftests:
|
wallyriscoftests:
|
||||||
# Builds riscv-arch-test 64 and 32-bit versions and builds wally-riscv-arch-test 64 and 32-bit versions
|
# Builds riscv-arch-test 64 and 32-bit versions and builds wally-riscv-arch-test 64 and 32-bit versions
|
||||||
make -C ../tests/riscof/ wally-riscv-arch-test
|
make -C ../tests/riscof/ wally-riscv-arch-test
|
||||||
|
|
||||||
memfiles:
|
memfiles:
|
||||||
make -f makefile-memfile wally-sim-files --jobs
|
make -f makefile-memfile wally-sim-files --jobs
|
||||||
|
|
||||||
|
@ -63,4 +63,10 @@ coveragetests:
|
||||||
|
|
||||||
deriv:
|
deriv:
|
||||||
derivgen.pl
|
derivgen.pl
|
||||||
|
|
||||||
|
benchmarks:
|
||||||
|
$(MAKE) -C ../benchmarks/embench build
|
||||||
|
$(MAKE) -C ../benchmarks/embench size
|
||||||
|
$(MAKE) -C ../benchmarks/embench modelsim_build_memfile
|
||||||
|
$(MAKE) -C ../benchmarks/coremark
|
||||||
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue