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fix up PLIC and UART checkpointing

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bbracker 2022-03-07 23:48:47 -08:00
parent 9dbcdca433
commit 51e68819c4
3 changed files with 58 additions and 27 deletions
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33
linux/testvector-generation/parseUartState.py
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@ -27,27 +27,24 @@ def tokenize(string):
print("Begin parsing UART state.")
# Parse Args
if len(sys.argv) != 3:
sys.exit('Error parseUartState.py expects 2 args: <raw GDB state dump> <output state file>')
rawUartStateFile=sys.argv[1]
outUartStateFile=sys.argv[2]
if len(sys.argv) != 2:
sys.exit('Error parseUartState.py expects 1 arg: <path_to_checkpoint_dir>')
outDir = sys.argv[1]+'/'
rawUartStateFile = outDir+'uartStateGDB.txt'
if not os.path.exists(rawUartStateFile):
sys.exit('Error input file '+rawUartStateFile+'not found')
# Main Loop
with open(rawUartStateFile, 'r') as rawUartStateFile:
with open(outUartStateFile, 'w') as outUartStateFile:
uartBytes = tokenize(rawUartStateFile.readline())[1:]
# Stores
# 0: RBR / Divisor Latch Low
# 1: IER / Divisor Latch High
# 2: IIR
# 3: LCR
# 4: MCR
# 5: LSR
# 6: MSR
# 7: SCR
for uartByte in uartBytes:
outUartStateFile.write(uartByte[2:]+'\n')
uartBytes = []
for i in range(0,8):
uartBytes += tokenize(rawUartStateFile.readline())[1:]
with open(outDir+'checkpoint-UART_IER', 'w') as outFile:
outFile.write(uartBytes[1][2:])
with open(outDir+'checkpoint-UART_LCR', 'w') as outFile:
outFile.write(uartBytes[3][2:])
with open(outDir+'checkpoint-UART_MCR', 'w') as outFile:
outFile.write(uartBytes[4][2:])
with open(outDir+'checkpoint-UART_SCR', 'w') as outFile:
outFile.write(uartBytes[7][2:])
print("Finished parsing UART state!")