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Improved simulation speed by gating bitmanip zbc's clmul's X and Y inputs with BSelect != 11. Reduced simulation time from 3m45s to 2m35s.
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2 changed files with 10 additions and 5 deletions
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@ -80,7 +80,10 @@ module bitmanipalu #(parameter WIDTH=32) (
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// ZBC Unit
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// ZBC Unit
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if (`ZBC_SUPPORTED) begin: zbc
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if (`ZBC_SUPPORTED) begin: zbc
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zbc #(WIDTH) ZBC(.A, .RevA, .B, .Funct3, .ZBCResult);
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logic ZBCSelect; // ZBC instruction
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assign ZBCSelect = BSelect == 2'b11;
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//assign ZBCSelect = 1'b0;
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zbc #(WIDTH) ZBC(.A, .RevA, .B, .ZBCSelect, .Funct3, .ZBCResult);
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end else assign ZBCResult = 0;
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end else assign ZBCResult = 0;
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// ZBB Unit
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// ZBB Unit
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@ -31,21 +31,23 @@
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module zbc #(parameter WIDTH=32) (
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module zbc #(parameter WIDTH=32) (
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input logic [WIDTH-1:0] A, RevA, B, // Operands
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input logic [WIDTH-1:0] A, RevA, B, // Operands
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input logic ZBCSelect, // ZBC instruction
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input logic [2:0] Funct3, // Indicates operation to perform
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input logic [2:0] Funct3, // Indicates operation to perform
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output logic [WIDTH-1:0] ZBCResult); // ZBC result
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output logic [WIDTH-1:0] ZBCResult); // ZBC result
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logic [WIDTH-1:0] ClmulResult, RevClmulResult;
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logic [WIDTH-1:0] ClmulResult, RevClmulResult;
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logic [WIDTH-1:0] RevB;
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logic [WIDTH-1:0] RevB;
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logic [WIDTH-1:0] X, Y;
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logic [WIDTH-1:0] X, Y, X1;
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bitreverse #(WIDTH) brB(B, RevB);
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bitreverse #(WIDTH) brB(B, RevB);
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mux3 #(WIDTH) xmux({RevA[WIDTH-2:0], {1'b0}}, RevA, A, ~Funct3[1:0], X);
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mux3 #(WIDTH) xmux1({RevA[WIDTH-2:0], {1'b0}}, RevA, A, ~Funct3[1:0], X1);
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mux2 #(WIDTH) ymux(RevB, B, ~Funct3[1], Y);
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mux2 #(WIDTH) xmux(X1, '0, ~ZBCSelect, X);
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mux3 #(WIDTH) ymux(RevB, B, '0, {~ZBCSelect, ~Funct3[1]}, Y);
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clmul #(WIDTH) clm(.X, .Y, .ClmulResult);
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clmul #(WIDTH) clm(.X, .Y, .ClmulResult);
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bitreverse #(WIDTH) brClmulResult(ClmulResult, RevClmulResult);
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bitreverse #(WIDTH) brClmulResult(ClmulResult, RevClmulResult);
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mux2 #(WIDTH) zbcresultmux(ClmulResult, RevClmulResult, Funct3[1], ZBCResult);
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mux2 #(WIDTH) zbcresultmux(ClmulResult, RevClmulResult, Funct3[1], ZBCResult);
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endmodule
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endmodule
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