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Fixed order counter in RVVI interface, resolving Issue #1304

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David Harris 2025-04-24 10:50:16 -07:00
parent 8556449af9
commit 817b716fd9
3 changed files with 11 additions and 2 deletions
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sim/questa/wally.do
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@ -189,7 +189,8 @@ vlog -permissive -lint -work ${WKDIR} {*}${INC_DIRS} {*}${DefineArgs} {*}${locks
# remove +acc flag for faster sim during regressions if there is no need to access internal signals
vopt $accFlag ${WKDIR}.${TESTBENCH} ${brekervopt} -work ${WKDIR} {*}${ExpandedParamArgs} -o testbenchopt ${CoverageVoptArg}
vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} {*}${PlusArgs} -fatal 7 {*}${SVLib} -suppress 3829 ${CoverageVsimArg}
vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} {*}${PlusArgs} -fatal 7 {*}${SVLib} -suppress 3829 ${CoverageVsimArg}
# +IDV_TRACE2LOG=1 (add this to vsim command to enable ImperasDV RVVI trace logging)
# power add generates the logging necessary for saif generation.
# power add -r /dut/core/*