github-mirrors/cvw
1
0
Fork 0
mirror of https://github.com/openhwgroup/cvw.git synced 2025-04-22 12:57:23 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

Converting illegal instruction from 00000000 to FFFFFFFF; the zeros is a compressed instruction, and is messing with the trap handler.

Browse source
This commit is contained in:
David Harris 2025-04-12 18:16:41 -07:00
parent 0a83488620
commit 81a848246a
8 changed files with 16 additions and 16 deletions
Download patch file Download diff file Expand all files Collapse all files

4
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-trap-01.reference_output
View file

@ -5,7 +5,7 @@ FFFFFFFF # stimecmp readback
00000000 # mtval of faulting instruction address (0x0)
00001880 # masked out mstatus.MPP = 11, mstatus.MPIE = 1, and mstatus.MIE = 0
00000002 # mcause from an Illegal instruction
00000000 # mtval of faulting instruction (0x0)
FFFFFFFF # mtval of faulting instruction (0x11111111)
00001880 # masked out mstatus.MPP = 11, mstatus.MPIE = 1, and mstatus.MIE = 0
00000003 # mcause from Breakpoint
80000168 # mtval of breakpoint instruction adress
@ -61,7 +61,7 @@ FFFFFFFF # stimecmp readback
00000000 # mtval of faulting instruction address (0x0)
00001880 # masked out mstatus.MPP = 11, mstatus.MPIE = 1, and mstatus.MIE = 0
00000002 # mcause from an Illegal instruction
00000000 # mtval of faulting instruction (0x0)
FFFFFFFF # stval of faulting instruction (0xFFFFFFFF)
00001880 # masked out mstatus.MPP = 11, mstatus.MPIE = 1, and mstatus.MIE = 0
00000003 # mcause from Breakpoint
80000168 # mtval of breakpoint instruction adress

4
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-trap-s-01.reference_output
View file

@ -6,7 +6,7 @@
00000000 # stval of faulting instruction address (0x0)
00000800 # masked out mstatus.mpp = 1, mstatus.MPIE = 0, and mstatus.MIE = 0
00000002 # scause from an Illegal instruction
00000000 # stval of faulting instruction (0x0)
FFFFFFFF # stval of faulting instruction (0xFFFFFFFF)
00000800 # masked out mstatus.mpp = 1, mstatus.MPIE = 0, and mstatus.MIE = 0
00000003 # scause from Breakpoint
80000168 # stval of breakpoint instruction adress
@ -57,7 +57,7 @@
00000000 # stval of faulting instruction address (0x0)
00000120 # masked out sstatus.SPP = 1, sstatus.SPIE = 1, and sstatus.SIE = 0
00000002 # scause from an Illegal instruction
00000000 # stval of faulting instruction (0x0)
FFFFFFFF # stval of faulting instruction (0xFFFFFFFF)
00000120 # masked out sstatus.SPP = 1, sstatus.SPIE = 1, and sstatus.SIE = 0
00000003 # scause from Breakpoint
80000168 # stval of breakpoint instruction adress

4
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-trap-u-01.reference_output
View file

@ -6,7 +6,7 @@
00000000 # stval of faulting instruction address (0x0)
00000000 # masked out mstatus.mpp = 0, mstatus.MPIE = 0, and mstatus.MIE = 0
00000002 # scause from an Illegal instruction
00000000 # stval of faulting instruction (0x0)
FFFFFFFF # stval of faulting instruction (0xFFFFFFFF)
00000000 # masked out mstatus.mpp = 0, mstatus.MPIE = 0, and mstatus.MIE = 0
00000003 # scause from Breakpoint
80000168 # stval of breakpoint instruction adress
@ -54,7 +54,7 @@
00000000 # stval of faulting instruction address (0x0)
00000020 # masked out sstatus.SPP = 0, sstatus.SPIE = 1, and sstatus.SIE = 0
00000002 # scause from an Illegal instruction
00000000 # stval of faulting instruction (0x0)
FFFFFFFF # stval of faulting instruction (0xFFFFFFFF)
00000020 # masked out sstatus.SPP = 0, sstatus.SPIE = 1, and sstatus.SIE = 0
00000003 # scause from Breakpoint
80000168 # stval of breakpoint instruction adress

2
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-TEST-LIB-32.h
View file

@ -89,7 +89,7 @@ cause_instr_access:
ret
cause_illegal_instr:
.insn 0x00000000 // 32 bit zero is an illegal instruction
.word 0xFFFFFFFF // 32 bit ones is an illegal instruction
ret
cause_breakpnt:

4
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-01.reference_output
View file

@ -13,7 +13,7 @@ FFFFFFFF # stimecmp low bits
00000000
00000002 # mcause from an Illegal instruction
00000000
00000000 # mtval of faulting instruction (0x0)
FFFFFFFF # mtval of faulting instruction (0xFFFFFFFF)
00000000
00001880 # masked out mstatus.MPP = 11, mstatus.MPIE = 1, and mstatus.MIE = 0
00000000
@ -125,7 +125,7 @@ FFFFFFFF # stimecmp low bits
00000000
00000002 # mcause from an Illegal instruction
00000000
00000000 # mtval of faulting instruction (0x0)
FFFFFFFF # mtval of faulting instruction (0xFFFFFFFF)
00000000
00001880 # masked out mstatus.MPP = 11, mstatus.MPIE = 1, and mstatus.MIE = 0
00000000

6
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-s-01.reference_output
View file

@ -8,13 +8,13 @@
00000000 # skipping instruction address fault since they're impossible with compressed instrs enabled
00000001 # scause from an instruction access fault
00000000
00000000 # stval of faulting instruction address (0x0)
00000000 # stval of faulting instruction address (0x00000000)
00000000
00000800 # masked out mstatus.mpp = 1, mstatus.MPIE = 0, and mstatus.MIE = 0
00000000
00000002 # scause from an Illegal instruction
00000000
00000000 # stval of faulting instruction (0x0)
FFFFFFFF # stval of faulting instruction (0xFFFFFFFF)
00000000
00000800 # masked out mstatus.mpp = 1, mstatus.MPIE = 0, and mstatus.MIE = 0
00000000
@ -116,7 +116,7 @@
00000000
00000002 # scause from an Illegal instruction
00000000
00000000 # stval of faulting instruction (0x0)
FFFFFFFF # stval of faulting instruction (0xFFFFFFFF)
00000000
00000120 # masked out sstatus.SPP = 1, sstatus.SPIE = 1, and sstatus.SIE = 0
00000000

6
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-trap-u-01.reference_output
View file

@ -8,13 +8,13 @@
00000000 # skipping instruction address fault since they're impossible with compressed instrs enabled
00000001 # scause from an instruction access fault
00000000
00000000 # stval of faulting instruction address (0x0)
00000000 # stval of faulting instruction address (0x00000000)
00000000
00000000 # masked out mstatus.mpp = 0, mstatus.MPIE = 0, and mstatus.MIE = 0
00000000
00000002 # scause from an Illegal instruction
00000000
00000000 # stval of faulting instruction (0x0)
FFFFFFFF # stval of faulting instruction (0xFFFFFFFF)
00000000
00000000 # masked out mstatus.mpp = 0, mstatus.MPIE = 0, and mstatus.MIE = 0
00000000
@ -110,7 +110,7 @@
00000000
00000002 # scause from an Illegal instruction
00000000
00000000 # stval of faulting instruction (0x0)
FFFFFFFF # stval of faulting instruction (0xFFFFFFFF)
00000000
00000020 # masked out sstatus.SPP = 0, sstatus.SPIE = 1, and sstatus.SIE = 0
00000000

2
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-TEST-LIB-64.h
View file

@ -90,7 +90,7 @@ cause_instr_access:
ret
cause_illegal_instr:
.insn 0x00000000 // 32 bit zero is an illegal instruction
.word 0xFFFFFFFF // 32 bit 1s is an illegal instruction
ret
cause_breakpnt: