Removed unused wave-dos

This commit is contained in:
David Harris 2024-04-06 13:52:13 -07:00
parent e8111da88a
commit c73a48cf22
7 changed files with 0 additions and 678 deletions

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@ -1,100 +0,0 @@
restart -f
delete wave /*
view wave
add wave /testbench/clk
add wave /testbench/reset
add wave -divider
# new
#add wave /testbench/dut/core/ebu/ebu/IReadF
add wave /testbench/dut/core/DataStall
add wave /testbench/dut/core/ICacheStallF
add wave /testbench/dut/core/StallF
add wave /testbench/dut/core/StallD
add wave /testbench/dut/core/StallE
add wave /testbench/dut/core/StallM
add wave /testbench/dut/core/StallW
add wave /testbench/dut/core/FlushD
add wave /testbench/dut/core/FlushE
add wave /testbench/dut/core/FlushM
add wave /testbench/dut/core/FlushW
add wave -noupdate -divider -height 32 "MulDiv"
add wave -hex /testbench/dut/core/mdu/*
add wave -noupdate -divider -height 32 "Integer Divider"
add wave -hex /testbench/dut/core/mdu/genblk1/div/fsm1/CURRENT_STATE
add wave -hex /testbench/dut/core/mdu/genblk1/div/fsm1/NEXT_STATE
add wave -hex /testbench/dut/core/mdu/genblk1/div/*
add wave -noupdate -divider -height 32 "RF"
add wave -hex /testbench/dut/core/ieu/dp/regf/*
add wave -hex /testbench/dut/core/ieu/dp/regf/rf
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCF
add wave -hex /testbench/dut/core/ifu/PCD
add wave -hex /testbench/dut/core/ifu/InstrD
add wave /testbench/InstrDName
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCE
add wave -hex /testbench/dut/core/ifu/InstrE
add wave /testbench/InstrEName
add wave -hex /testbench/dut/core/ieu/dp/SrcAE
add wave -hex /testbench/dut/core/ieu/dp/SrcBE
add wave -hex /testbench/dut/core/ieu/dp/ALUResultE
#add wave /testbench/dut/core/ieu/dp/PCSrcE
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCM
add wave -hex /testbench/dut/core/ifu/InstrM
add wave /testbench/InstrMName
add wave /testbench/dut/uncore/uncore/ram/memwrite
add wave -hex /testbench/dut/uncore/uncore/HADDR
add wave -hex /testbench/dut/uncore/uncore/HWDATA
add wave -divider
add wave -hex /testbench/dut/core/ebu/ebu/MemReadM
add wave -hex /testbench/dut/core/ebu/ebu/InstrReadF
add wave -hex /testbench/dut/core/ebu/ebu/BusState
add wave -hex /testbench/dut/core/ebu/ebu/NextBusState
add wave -hex /testbench/dut/core/ebu/ebu/HADDR
add wave -hex /testbench/dut/core/ebu/ebu/HREADY
add wave -hex /testbench/dut/core/ebu/ebu/HTRANS
add wave -hex /testbench/dut/core/ebu/ebu/HRDATA
add wave -hex /testbench/dut/core/ebu/ebu/HWRITE
add wave -hex /testbench/dut/core/ebu/ebu/HWDATA
add wave -hex /testbench/dut/core/ebu/ebu/HBURST
add wave -hex /testbench/dut/core/ebu/ebu/CaptureDataM
add wave -divider
add wave -hex /testbench/dut/uncore/uncore/ram/*
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCW
add wave -hex /testbench/dut/core/ifu/InstrW
add wave /testbench/InstrWName
add wave /testbench/dut/core/ieu/dp/RegWriteW
add wave -hex /testbench/dut/core/ebu/ebu/ReadDataW
add wave -hex /testbench/dut/core/ieu/dp/ResultW
add wave -hex /testbench/dut/core/ieu/dp/RdW
add wave -divider
add wave -hex /testbench/dut/uncore/uncore/ram/*
add wave -divider
# appearance
TreeUpdate [SetDefaultTree]
WaveRestoreZoom {0 ps} {100 ps}
configure wave -namecolwidth 350
configure wave -valuecolwidth 250
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
set DefaultRadix hexadecimal

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@ -1,89 +0,0 @@
# ahb-waves.do
restart -f
delete wave /*
view wave
add wave /testbench/clk
add wave /testbench/reset
add wave -divider
#add wave /testbench/dut/core/ebu/ebu/IReadF
add wave /testbench/dut/core/DataStall
add wave /testbench/dut/core/ICacheStallF
add wave /testbench/dut/core/StallF
add wave /testbench/dut/core/StallD
add wave /testbench/dut/core/StallE
add wave /testbench/dut/core/StallM
add wave /testbench/dut/core/StallW
add wave /testbench/dut/core/FlushD
add wave /testbench/dut/core/FlushE
add wave /testbench/dut/core/FlushM
add wave /testbench/dut/core/FlushW
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCF
add wave -hex /testbench/dut/core/ifu/PCD
add wave -hex /testbench/dut/core/ifu/InstrD
add wave /testbench/InstrDName
add wave -hex /testbench/dut/core/ifu/ic/InstrRawD
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCE
add wave -hex /testbench/dut/core/ifu/InstrE
add wave /testbench/InstrEName
add wave -hex /testbench/dut/core/ieu/dp/SrcAE
add wave -hex /testbench/dut/core/ieu/dp/SrcBE
add wave -hex /testbench/dut/core/ieu/dp/ALUResultE
#add wave /testbench/dut/core/ieu/dp/PCSrcE
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCM
add wave -hex /testbench/dut/core/ifu/InstrM
add wave /testbench/InstrMName
add wave /testbench/dut/uncore/uncore/ram/memwrite
add wave -hex /testbench/dut/uncore/uncore/HADDR
add wave -hex /testbench/dut/uncore/uncore/HWDATA
add wave -divider
add wave -hex /testbench/dut/core/ebu/ebu/MemReadM
add wave -hex /testbench/dut/core/ebu/ebu/InstrReadF
add wave -hex /testbench/dut/core/ebu/ebu/BusState
add wave -hex /testbench/dut/core/ebu/ebu/NextBusState
add wave -hex /testbench/dut/core/ebu/ebu/HADDR
add wave -hex /testbench/dut/core/ebu/ebu/HREADY
add wave -hex /testbench/dut/core/ebu/ebu/HTRANS
add wave -hex /testbench/dut/core/ebu/ebu/HRDATA
add wave -hex /testbench/dut/core/ebu/ebu/HWRITE
add wave -hex /testbench/dut/core/ebu/ebu/HWDATA
add wave -hex /testbench/dut/core/ebu/ebu/CaptureDataM
add wave -divider
add wave -hex /testbench/dut/uncore/uncore/ram/*
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCW
add wave -hex /testbench/dut/core/ifu/InstrW
add wave /testbench/InstrWName
add wave /testbench/dut/core/ieu/dp/RegWriteW
add wave -hex /testbench/dut/core/ebu/ebu/ReadDataW
add wave -hex /testbench/dut/core/ieu/dp/ResultW
add wave -hex /testbench/dut/core/ieu/dp/RdW
add wave -divider
add wave -hex /testbench/dut/uncore/uncore/ram/*
add wave -divider
add wave -hex -r /testbench/*
# appearance
TreeUpdate [SetDefaultTree]
WaveRestoreZoom {0 ps} {100 ps}
configure wave -namecolwidth 250
configure wave -valuecolwidth 150
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
set DefaultRadix hexadecimal

View file

@ -1,76 +0,0 @@
add wave /testbench/clk
add wave /testbench/reset
add wave -divider
#add wave /testbench/dut/core/ebu/ebu/IReadF
add wave /testbench/dut/core/DataStall
add wave /testbench/dut/core/ICacheStallF
add wave /testbench/dut/core/StallF
add wave /testbench/dut/core/StallD
add wave /testbench/dut/core/StallE
add wave /testbench/dut/core/StallM
add wave /testbench/dut/core/StallW
add wave /testbench/dut/core/FlushD
add wave /testbench/dut/core/FlushE
add wave /testbench/dut/core/FlushM
add wave /testbench/dut/core/FlushW
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCF
add wave -hex /testbench/dut/core/ifu/PCD
add wave -hex /testbench/dut/core/ifu/InstrD
add wave /testbench/InstrDName
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCE
add wave -hex /testbench/dut/core/ifu/InstrE
add wave /testbench/InstrEName
add wave -hex /testbench/dut/core/ieu/dp/SrcAE
add wave -hex /testbench/dut/core/ieu/dp/SrcBE
add wave -hex /testbench/dut/core/ieu/dp/ALUResultE
#add wave /testbench/dut/core/ieu/dp/PCSrcE
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCM
add wave -hex /testbench/dut/core/ifu/InstrM
add wave /testbench/InstrMName
add wave /testbench/dut/uncore/uncore/ram/memwrite
add wave -hex /testbench/dut/uncore/uncore/HADDR
add wave -hex /testbench/dut/uncore/uncore/HWDATA
add wave -divider
add wave -hex /testbench/dut/core/ebu/ebu/MemReadM
add wave -hex /testbench/dut/core/ebu/ebu/InstrReadF
add wave -hex /testbench/dut/core/ebu/ebu/BusState
add wave -hex /testbench/dut/core/ebu/ebu/NextBusState
add wave -hex /testbench/dut/core/ebu/ebu/HADDR
add wave -hex /testbench/dut/core/ebu/ebu/HREADY
add wave -hex /testbench/dut/core/ebu/ebu/HTRANS
add wave -hex /testbench/dut/core/ebu/ebu/HRDATA
add wave -hex /testbench/dut/core/ebu/ebu/HWRITE
add wave -hex /testbench/dut/core/ebu/ebu/HWDATA
add wave -hex /testbench/dut/core/ebu/ebu/ReadDataM
add wave -divider
add wave /testbench/dut/core/ebu/ebu/CaptureDataM
add wave /testbench/dut/core/ebu/ebu/CapturedDataAvailable
add wave /testbench/dut/core/StallW
add wave -hex /testbench/dut/core/ebu/ebu/CapturedData
add wave -hex /testbench/dut/core/ebu/ebu/ReadDataWnext
add wave -hex /testbench/dut/core/ebu/ebu/ReadDataW
add wave -hex /testbench/dut/core/ifu/PCW
add wave -hex /testbench/dut/core/ifu/InstrW
add wave /testbench/InstrWName
add wave /testbench/dut/core/ieu/dp/RegWriteW
add wave -hex /testbench/dut/core/ebu/ebu/ReadDataW
add wave -hex /testbench/dut/core/ieu/dp/ResultW
add wave -hex /testbench/dut/core/ieu/dp/RdW
add wave -divider
add wave -hex /testbench/dut/core/dmem/*
add wave -hex /testbench/dut/core/dmem/genblk1/*
add wave -divider
add wave -hex -r /testbench/*

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@ -1,65 +0,0 @@
# default-waves.do
restart -f
delete wave /*
view wave
# Diplays All Signals recursively
add wave /testbench/clk
add wave /testbench/reset
add wave -divider
#add wave /testbench/dut/core/ebu/ebu/IReadF
#add wave /testbench/dut/core/DataStall
add wave /testbench/dut/core/ICacheStallF
add wave /testbench/dut/core/StallF
add wave /testbench/dut/core/StallD
add wave /testbench/dut/core/StallE
add wave /testbench/dut/core/StallM
add wave /testbench/dut/core/StallW
add wave /testbench/dut/core/FlushD
add wave /testbench/dut/core/FlushE
add wave /testbench/dut/core/FlushM
add wave /testbench/dut/core/FlushW
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCF
add wave -hex /testbench/dut/core/ifu/PCD
add wave -hex /testbench/dut/core/ifu/InstrD
add wave /testbench/InstrDName
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCE
add wave -hex /testbench/dut/core/ifu/InstrE
add wave /testbench/InstrEName
add wave -hex /testbench/dut/core/ieu/dp/SrcAE
add wave -hex /testbench/dut/core/ieu/dp/SrcBE
add wave -hex /testbench/dut/core/ieu/dp/ALUResultE
#add wave /testbench/dut/core/ieu/dp/PCSrcE
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCM
add wave -hex /testbench/dut/core/ifu/InstrM
add wave /testbench/InstrMName
add wave /testbench/dut/uncore/uncore/ram/memwrite
add wave -hex /testbench/dut/uncore/uncore/HADDR
add wave -hex /testbench/dut/uncore/uncore/HWDATA
add wave -divider
add wave -hex /testbench/PCW
add wave -hex /testbench/InstrW
add wave /testbench/InstrWName
add wave /testbench/dut/core/ieu/dp/RegWriteW
add wave -hex /testbench/dut/core/ieu/dp/ResultW
add wave -hex /testbench/dut/core/ieu/dp/RdW
add wave -divider
add wave -hex -r /testbench/*
# appearance
TreeUpdate [SetDefaultTree]
WaveRestoreZoom {0 ps} {100 ps}
configure wave -namecolwidth 250
configure wave -valuecolwidth 150
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
set DefaultRadix hexadecimal

View file

@ -1,23 +0,0 @@
# default-waves.do
restart -f
delete wave /*
view wave
# Diplays All Signals recursively
add wave /testbench/clk
add wave /testbench/reset
add wave -divider
add wave -hex -r /testbench/*
# appearance
TreeUpdate [SetDefaultTree]
WaveRestoreZoom {0 ps} {300 ps}
configure wave -namecolwidth 350
configure wave -valuecolwidth 150
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
set DefaultRadix hexadecimal

View file

@ -1,207 +0,0 @@
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -divider <NULL>
add wave -noupdate /testbench/clk
add wave -noupdate /testbench/reset
add wave -noupdate -radix decimal /testbench/errorCount
add wave -noupdate -radix decimal /testbench/InstrCountW
add wave -noupdate -divider Stalls_and_Flushes
add wave -noupdate /testbench/dut/core/StallF
add wave -noupdate /testbench/dut/core/StallD
add wave -noupdate /testbench/dut/core/StallE
add wave -noupdate /testbench/dut/core/StallM
add wave -noupdate /testbench/dut/core/StallW
add wave -noupdate /testbench/dut/core/FlushD
add wave -noupdate /testbench/dut/core/FlushE
add wave -noupdate /testbench/dut/core/FlushM
add wave -noupdate /testbench/dut/core/FlushW
add wave -noupdate -divider F
add wave -noupdate -radix hexadecimal /testbench/dut/core/ifu/PCF
add wave -noupdate -divider D
add wave -noupdate -radix hexadecimal /testbench/dut/core/ifu/PCD
add wave -noupdate /testbench/InstrDName
add wave -noupdate -radix hexadecimal /testbench/dut/core/ifu/InstrD
add wave -noupdate -radix hexadecimal /testbench/dut/core/ieu/c/InstrValidD
add wave -noupdate -divider E
add wave -noupdate -radix hexadecimal /testbench/dut/core/ifu/PCE
add wave -noupdate /testbench/InstrEName
add wave -noupdate -radix hexadecimal /testbench/dut/core/ifu/InstrE
add wave -noupdate -radix hexadecimal /testbench/dut/core/ieu/c/InstrValidE
add wave -noupdate -radix hexadecimal /testbench/dut/core/ieu/dp/SrcAE
add wave -noupdate -radix hexadecimal /testbench/dut/core/ieu/dp/SrcBE
add wave -noupdate -radix hexadecimal /testbench/dut/core/ieu/dp/ALUResultE
add wave -noupdate -divider M
add wave -noupdate -radix hexadecimal /testbench/dut/core/ifu/PCM
add wave -noupdate /testbench/InstrMName
add wave -noupdate /testbench/textM
add wave -noupdate -radix hexadecimal /testbench/dut/core/ifu/InstrM
add wave -noupdate -radix hexadecimal /testbench/dut/core/ieu/c/InstrValidM
add wave -noupdate -radix hexadecimal /testbench/dut/core/lsu.bus.dcache/MemPAdrM
add wave -noupdate -radix hexadecimal /testbench/dut/core/lsu.bus.dcache/MemRWM
add wave -noupdate /testbench/dut/core/lsu.bus.dcache/WriteDataM
add wave -noupdate -radix hexadecimal /testbench/dut/core/lsu.bus.dcache/ReadDataM
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/DTLBWalk
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/BasePageTablePPN
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/CurrentPPN
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/MemWrite
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/Executable
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/Writable
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/Readable
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/Valid
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/Misaligned
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/MegapageMisaligned
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/ValidPTE
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/LeafPTE
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/ValidLeafPTE
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/ValidNonLeafPTE
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/StartWalk
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/TLBMiss
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/PRegEn
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/NextPageType
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/SvMode
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/TranslationVAdr
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/WalkerState
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/NextWalkerState
add wave -noupdate -group Walker /testbench/dut/core/lsu/hptw/genblk1/InitialWalkerState
add wave -noupdate -group LSU -r /testbench/dut/core/lsu/*
add wave -noupdate -group DCache -r /testbench/dut/core/lsu.bus.dcache/*
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/clk
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/reset
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/StallW
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/UnsignedLoadM
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/AtomicMaskedM
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/Funct7M
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/InstrPAdrF
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/InstrReadF
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/InstrRData
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/InstrAckF
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/DCtoAHBPAdrM
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/DCtoAHBReadM
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/DCtoAHBWriteM
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/DCtoAHBWriteData
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/DCfromAHBReadData
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/MemSizeM
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/DCfromAHBAck
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HRDATA
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HREADY
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HRESP
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HCLK
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HRESETn
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HADDR
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HWDATA
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HWRITE
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HSIZE
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HBURST
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HPROT
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HTRANS
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HMASTLOCK
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HADDRD
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HSIZED
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HWRITED
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/GrantData
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/AccessAddress
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/ISize
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HRDATAMasked
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/ReadDataM
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/HRDATANext
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/CapturedHRDATAMasked
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/WriteData
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/IReady
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/DReady
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/CaptureDataM
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/CapturedDataAvailable
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/BusState
add wave -noupdate -group EBU /testbench/dut/core/ebu/ebu/NextBusState
add wave -noupdate -divider W
add wave -noupdate -radix hexadecimal /testbench/PCW
add wave -noupdate -radix hexadecimal /testbench/dut/core/ieu/c/InstrValidW
add wave -noupdate /testbench/textM
add wave -noupdate /testbench/dut/core/ieu/dp/ReadDataW
add wave -noupdate -radix hexadecimal /testbench/dut/core/ieu/dp/ResultW
add wave -noupdate -group RF /testbench/dut/core/ieu/dp/RegWriteW
add wave -noupdate -group RF -radix unsigned /testbench/dut/core/ieu/dp/RdW
add wave -noupdate -group RF /testbench/dut/core/ieu/dp/regf/wd3
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[2]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[3]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[4]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[5]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[6]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[7]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[8]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[9]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[10]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[11]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[12]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[13]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[14]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[15]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[16]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[17]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[18]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[19]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[20]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[21]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[22]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[23]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[24]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[25]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[26]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[27]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[28]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[29]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[30]}
add wave -noupdate -group RF -radix hexadecimal {/testbench/dut/core/ieu/dp/regf/rf[31]}
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/MSTATUS_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/MCOUNTINHIBIT_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/MCOUNTEREN_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csri/MIDELEG_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csri/MIP_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csri/MIE_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrm/MEPC_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrm/MTVEC_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrm/MCOUNTEREN_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrm/MCOUNTINHIBIT_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrm/MEDELEG_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrm/MIDELEG_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrm/MSCRATCH_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrm/MCAUSE_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrm/MTVAL_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/SSTATUS_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/SCOUNTEREN_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csri/SIP_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csri/SIE_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrs/SEPC_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrs/STVEC_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrs/SCOUNTEREN_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrs/SEDELEG_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrs/SIDELEG_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrs/SATP_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/USTATUS_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrn/UEPC_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrn/UTVEC_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrn/UIP_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrn/UIE_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrm/PMPCFG_ARRAY_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrm/PMPADDR_ARRAY_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csrm/MISA_REGW
add wave -noupdate -group CSR -radix hexadecimal /testbench/dut/core/priv/csr/genblk1/csru/FRM_REGW
add wave -noupdate -divider <NULL>
add wave -hex -r /testbench/*
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 8} {42752672 ns} 1} {{Cursor 2} {42752634 ns} 0}
quietly wave cursor active 2
configure wave -namecolwidth 250
configure wave -valuecolwidth 297
configure wave -justifyvalue left
configure wave -signalnamewidth 1
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {42752559 ns} {42752771 ns}

View file

@ -1,118 +0,0 @@
# peripheral-waves.do
restart -f
delete wave /*
view wave
# general stuff
add wave /testbench/clk
add wave /testbench/reset
add wave -divider
#add wave /testbench/dut/core/DataStall
add wave /testbench/dut/core/StallF
add wave /testbench/dut/core/StallD
add wave /testbench/dut/core/StallE
add wave /testbench/dut/core/StallM
add wave /testbench/dut/core/StallW
add wave /testbench/dut/core/FlushD
add wave /testbench/dut/core/FlushE
add wave /testbench/dut/core/FlushM
add wave /testbench/dut/core/FlushW
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCF
add wave -hex /testbench/dut/core/ifu/PCD
add wave -hex /testbench/dut/core/ifu/InstrD
add wave -hex /testbench/dut/core/ieu/c/InstrValidD
add wave /testbench/InstrDName
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCE
add wave -hex /testbench/dut/core/ifu/InstrE
add wave -hex /testbench/dut/core/ieu/c/InstrValidE
add wave /testbench/InstrEName
add wave -hex /testbench/dut/core/ieu/dp/SrcAE
add wave -hex /testbench/dut/core/ieu/dp/SrcBE
add wave -hex /testbench/dut/core/ieu/dp/ALUResultE
#add wave /testbench/dut/core/ieu/dp/PCSrcE
add wave /testbench/dut/core/mdu/genblk1/div/DivStartE
add wave /testbench/dut/core/mdu/DivBusyE
add wave -hex /testbench/dut/core/mdu/genblk1/div/RemM
add wave -hex /testbench/dut/core/mdu/genblk1/div/QuotM
add wave -divider
add wave -hex /testbench/dut/core/ifu/PCM
add wave -hex /testbench/dut/core/ifu/InstrM
add wave -hex /testbench/dut/core/ieu/c/InstrValidM
add wave /testbench/InstrMName
add wave /testbench/dut/uncore/uncore/ram/memwrite
add wave -hex /testbench/dut/core/WriteDataM
add wave -hex /testbench/dut/core/lsu.bus.dcache/MemPAdrM
add wave -hex /testbench/dut/core/lsu.bus.dcache/WriteDataM
add wave -hex /testbench/dut/core/lsu.bus.dcache/ReadDataM
add wave -divider
add wave -hex /testbench/PCW
#add wave -hex /testbench/InstrW
#add wave -hex /testbench/dut/core/ieu/c/InstrValidW
#add wave /testbench/InstrWName
add wave -hex /testbench/dut/core/ReadDataW
add wave -hex /testbench/dut/core/ieu/dp/ResultW
add wave -hex /testbench/dut/core/ieu/dp/RegWriteW
add wave -hex /testbench/dut/core/ieu/dp/WriteDataW
add wave -hex /testbench/dut/core/ieu/dp/RdW
add wave -divider
add wave -hex /testbench/dut/core/priv/csr/TrapM
add wave -hex /testbench/dut/core/priv/csr/UnalignedNextEPCM
add wave -hex /testbench/dut/core/priv/csr/genblk1/csrm/WriteMEPCM
add wave -hex /testbench/dut/core/priv/csr/genblk1/csrm/MEPC_REGW
add wave -divider RegFile
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[1]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[2]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[3]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[4]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[5]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[6]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[7]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[8]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[9]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[10]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[11]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[12]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[13]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[14]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[15]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[16]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[17]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[18]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[19]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[20]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[21]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[22]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[23]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[24]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[25]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[26]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[27]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[28]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[29]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[30]
add wave -hex /testbench/dut/core/ieu/dp/regf/rf[31]
# peripherals
add wave -divider PLIC
add wave -hex /testbench/dut/core/priv/csr/TrapM
add wave -hex /testbench/dut/uncore/uncore/plic/plic/*
add wave -hex /testbench/dut/uncore/uncore/plic/plic/intPriority
add wave -hex /testbench/dut/uncore/uncore/plic/plic/pendingArray
add wave -divider UART
add wave -hex /testbench/dut/uncore/uncore/uart/uart/u/*
add wave -divider GPIO
add wave -hex /testbench/dut/uncore/uncore/gpio/gpio/*
#add wave -divider
#add wave -hex /testbench/dut/core/ebu/ebu/*
#add wave -divider
#add wave -divider
# everything else
add wave -hex -r /testbench/*