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https://github.com/openhwgroup/cvw.git
synced 2025-04-24 13:57:07 -04:00
Fixed a bunch of odd bugs with the test bench preventing correct measurement of performance counters.
This commit is contained in:
Ross Thompson
parent
015104f0ed
commit
cab6b9dfc8
3 changed files with 41 additions and 22 deletions
27
sim/wave.do
27
sim/wave.do
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@ -6,6 +6,17 @@ add wave -noupdate /testbench/reset
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add wave -noupdate /testbench/reset_ext
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add wave -noupdate /testbench/memfilename
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add wave -noupdate /testbench/dut/core/SATP_REGW
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add wave -noupdate /testbench/FunctionName/FunctionName/PCD
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add wave -noupdate /testbench/FunctionName/FunctionName/PCE
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add wave -noupdate /testbench/FunctionName/FunctionName/PCF
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add wave -noupdate /testbench/FunctionName/FunctionName/PCM
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add wave -noupdate /testbench/FunctionName/FunctionName/PCM_temp
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add wave -noupdate /testbench/FunctionName/FunctionName/PCMOld
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add wave -noupdate /testbench/dut/core/InstrValidM
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add wave -noupdate /testbench/FunctionName/FunctionName/FunctionAddr
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add wave -noupdate /testbench/FunctionName/FunctionName/ProgramAddrIndex
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add wave -noupdate /testbench/FunctionName/FunctionName/FunctionName
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add wave -noupdate /testbench/FunctionName/FunctionName/ProgramAddrMapLineCount
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add wave -noupdate -group HDU -expand -group hazards /testbench/dut/core/hzu/RetM
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add wave -noupdate -group HDU -expand -group hazards -color Pink /testbench/dut/core/hzu/TrapM
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add wave -noupdate -group HDU -expand -group hazards /testbench/dut/core/hzu/LoadStallD
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@ -55,11 +66,12 @@ add wave -noupdate -group {Decode Stage} /testbench/dut/core/ieu/c/RegWriteD
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add wave -noupdate -group {Decode Stage} /testbench/dut/core/ieu/dp/RdD
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add wave -noupdate -group {Decode Stage} /testbench/dut/core/ieu/dp/Rs1D
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add wave -noupdate -group {Decode Stage} /testbench/dut/core/ieu/dp/Rs2D
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add wave -noupdate -expand -group {Execution Stage} /testbench/dut/core/ifu/PCE
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add wave -noupdate -expand -group {Execution Stage} /testbench/dut/core/ifu/InstrE
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add wave -noupdate -expand -group {Execution Stage} /testbench/InstrEName
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add wave -noupdate -expand -group {Execution Stage} /testbench/dut/core/ieu/c/InstrValidE
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add wave -noupdate -expand -group {Execution Stage} /testbench/FunctionName/FunctionName/FunctionName
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add wave -noupdate -group {Execution Stage} /testbench/dut/core/ifu/PCE
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add wave -noupdate -group {Execution Stage} /testbench/dut/core/ifu/InstrE
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add wave -noupdate -group {Execution Stage} /testbench/InstrEName
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add wave -noupdate -group {Execution Stage} /testbench/dut/core/ieu/c/InstrValidE
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add wave -noupdate -expand -group {Memory Stage} /testbench/FunctionName/FunctionName/FunctionName
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add wave -noupdate -expand -group {Memory Stage} /testbench/dut/core/InstrValidM
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add wave -noupdate -expand -group {Memory Stage} /testbench/dut/core/PCM
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add wave -noupdate -expand -group {Memory Stage} /testbench/dut/core/InstrM
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add wave -noupdate -expand -group {Memory Stage} /testbench/InstrMName
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@ -622,10 +634,9 @@ add wave -noupdate /testbench/dut/core/priv/priv/csr/counters/counters/ICacheAcc
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add wave -noupdate /testbench/dut/core/priv/priv/csr/counters/counters/DCacheMiss
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add wave -noupdate /testbench/dut/core/priv/priv/csr/counters/counters/InstrValidNotFlushedM
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add wave -noupdate /testbench/clk
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add wave -noupdate /testbench/HPMCSample/FinalHPMCOUNTERH
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add wave -noupdate /testbench/HPMCSample/InitialHPMCOUNTERH
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TreeUpdate [SetDefaultTree]
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WaveRestoreCursors {{Cursor 2} {314596 ns} 1} {{Cursor 3} {314460 ns} 1} {{Cursor 4} {391801 ns} 1} {{Cursor 4} {717301 ns} 0} {{Cursor 5} {394987 ns} 1}
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WaveRestoreCursors {{Cursor 2} {314596 ns} 1} {{Cursor 3} {314460 ns} 1} {{Cursor 4} {391801 ns} 1} {{Cursor 4} {49231900 ns} 0} {{Cursor 5} {394987 ns} 1}
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quietly wave cursor active 4
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configure wave -namecolwidth 250
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configure wave -valuecolwidth 194
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@ -641,4 +652,4 @@ configure wave -griddelta 40
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configure wave -timeline 0
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configure wave -timelineunits ns
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update
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WaveRestoreZoom {717254 ns} {717585 ns}
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WaveRestoreZoom {49231842 ns} {49231960 ns}
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@ -35,22 +35,29 @@ module FunctionName(reset, clk, ProgramAddrMapFile, ProgramLabelMapFile);
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string FunctionName;
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logic [`XLEN-1:0] PCF, PCD, PCE, FunctionAddr;
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logic StallD, StallE, FlushD, FlushE;
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logic [`XLEN-1:0] PCF, PCD, PCE, PCM, FunctionAddr, PCM_temp, PCMOld;
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logic StallD, StallE, StallM, FlushD, FlushE, FlushM;
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logic InstrValidM;
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integer ProgramAddrIndex, ProgramAddrIndexQ;
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assign PCF = testbench.dut.core.ifu.PCF;
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assign StallD = testbench.dut.core.StallD;
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assign StallE = testbench.dut.core.StallE;
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assign StallM = testbench.dut.core.StallM;
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assign FlushD = testbench.dut.core.FlushD;
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assign FlushE = testbench.dut.core.FlushE;
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assign FlushM = testbench.dut.core.FlushM;
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assign InstrValidM = testbench.dut.core.InstrValidM;
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// copy from ifu
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// when the F and D stages are flushed we need to ensure the PCE is held so that the function name does not
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// erroneously change.
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flopenrc #(`XLEN) PCDReg(clk, reset, 1'b0, ~StallD, FlushE & FlushD ? PCE : PCF, PCD);
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flopenr #(`XLEN) PCEReg(clk, reset, ~StallE, FlushE ? PCE : PCD, PCE);
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// also need to hold the old value not an erroneously fetched PC.
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flopenr #(`XLEN) PCDReg(clk, reset, ~StallD, FlushD ? PCE : PCF, PCD);
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flopenr #(`XLEN) PCEReg(clk, reset, ~StallE, FlushD & FlushE ? PCF : FlushE ? PCE : PCD, PCE);
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flopenr #(`XLEN) PCMReg(clk, reset, ~StallM, FlushD & FlushE & FlushM ? PCF : FlushE & FlushM ? PCE : FlushM ? PCM : PCE, PCM_temp);
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flopenr #(`XLEN) PCMOldReg(clk, reset, InstrValidM, PCM_temp, PCMOld);
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assign PCM = InstrValidM ? PCM_temp : PCMOld;
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task automatic bin_search_min;
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@ -111,7 +118,11 @@ module FunctionName(reset, clk, ProgramAddrMapFile, ProgramLabelMapFile);
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// preload
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// initial begin
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always @ (posedge reset) begin
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always @ (negedge reset) begin
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// clear out the old mapping between programs.
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foreach(ProgramAddrMapMemory[i]) ProgramAddrMapMemory.delete(i);
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foreach(ProgramLabelMapMemory[i]) ProgramLabelMapMemory.delete(i);
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$readmemh(ProgramAddrMapFile, ProgramAddrMapMemory);
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// we need to count the number of lines in the file so we can set FunctionRadixLineCount.
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@ -147,11 +158,14 @@ module FunctionName(reset, clk, ProgramAddrMapFile, ProgramLabelMapFile);
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$display("Cannot open file %s for reading.", ProgramLabelMapFile);
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end
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$fclose(ProgramLabelMapFP);
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foreach(ProgramAddrMapMemory[i]) $display("%x", ProgramAddrMapMemory[i]);
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foreach(ProgramLabelMapMemory[i]) $display("%s", ProgramLabelMapMemory[i]);
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end
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always @(PCE) begin
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bin_search_min(PCE, ProgramAddrMapLineCount, ProgramAddrMapMemory, FunctionAddr, ProgramAddrIndex);
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always @(PCM) begin
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bin_search_min(PCM, ProgramAddrMapLineCount, ProgramAddrMapMemory, FunctionAddr, ProgramAddrIndex);
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end
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logic OrReducedAdr, AnyUnknown;
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@ -408,7 +408,6 @@ logic [3:0] dummy;
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logic StartSample;
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logic EndSample, EndSampleFirst, EndSampleDelayed;
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logic [`XLEN-1:0] InitialHPMCOUNTERH[`COUNTERS-1:0];
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logic [`XLEN-1:0] FinalHPMCOUNTERH[`COUNTERS-1:0];
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string HPMCnames[] = '{"Mcycle",
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"------",
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@ -464,11 +463,6 @@ logic [3:0] dummy;
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InitialHPMCOUNTERH[HPMCindex] <= dut.core.priv.priv.csr.counters.counters.HPMCOUNTER_REGW[HPMCindex];
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end
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end
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if(EndSample) begin
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for(HPMCindex = 0; HPMCindex < 32; HPMCindex += 1) begin
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FinalHPMCOUNTERH[HPMCindex] <= dut.core.priv.priv.csr.counters.counters.HPMCOUNTER_REGW[HPMCindex];
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end
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end
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if(EndSample) begin
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for(HPMCindex = 0; HPMCindex < HPMCnames.size(); HPMCindex += 1) begin
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// unlikely to have more than 10M in any counter.
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