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Merge pull request #1302 from davidharrishmc/dev
E154 lab 4 script, cleanup, fix ebu.S page tables
This commit is contained in:
Jordan Carlin
GitHub
commit
d07d7149cf
13 changed files with 80 additions and 83 deletions
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@ -132,9 +132,9 @@
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--callcommand refRoot/cpu/setPMA -lo 0x0000012100 -hi 0x000001211F -attributes " rw-aA- --48 " # SDC
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--callcommand refRoot/cpu/setPMA -lo 0x0002000000 -hi 0x000200FFFF -attributes " rw-aA- 1248 " # CLINT
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--callcommand refRoot/cpu/setPMA -lo 0x000C000000 -hi 0x000FFFFFFF -attributes " rw-aA- --4- " # PLIC
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--callcommand refRoot/cpu/setPMA -lo 0x0010000000 -hi 0x0010000007 -attributes " rw-aA- 1--- " # UART0 error - 0x10000000 - 0x100000FF
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--callcommand refRoot/cpu/setPMA -lo 0x0010060000 -hi 0x00100600FF -attributes " rw-aA- --4- " # GPIO error - 0x10069000 - 0x100600FF
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--callcommand refRoot/cpu/setPMA -lo 0x0010040000 -hi 0x0010040FFF -attributes " rw-aA- --4- " # SPI error - 0x10040000 - 0x10040FFF
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--callcommand refRoot/cpu/setPMA -lo 0x0010000000 -hi 0x0010000007 -attributes " rw-aA- 1--- " # UART0
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--callcommand refRoot/cpu/setPMA -lo 0x0010060000 -hi 0x00100600FF -attributes " rw-aA- --4- " # GPIO
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--callcommand refRoot/cpu/setPMA -lo 0x0010040000 -hi 0x0010040FFF -attributes " rw-aA- --4- " # SPI
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--callcommand refRoot/cpu/setPMA -lo 0x0080000000 -hi 0x008FFFFFFF -attributes " rwx--- 1248 " # UNCORE_RAM
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# Enable the Imperas instruction coverage
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@ -131,9 +131,9 @@
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--callcommand refRoot/cpu/setPMA -lo 0x0000012100 -hi 0x000001211F -attributes " rw-aA- --48 " # SDC
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--callcommand refRoot/cpu/setPMA -lo 0x0002000000 -hi 0x000200FFFF -attributes " rw-aA- 1248 " # CLINT
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--callcommand refRoot/cpu/setPMA -lo 0x000C000000 -hi 0x000FFFFFFF -attributes " rw-aA- --4- " # PLIC
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--callcommand refRoot/cpu/setPMA -lo 0x0010000000 -hi 0x0010000007 -attributes " rw-aA- 1--- " # UART0 error - 0x10000000 - 0x100000FF
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--callcommand refRoot/cpu/setPMA -lo 0x0010060000 -hi 0x00100600FF -attributes " rw-aA- --4- " # GPIO error - 0x10069000 - 0x100600FF
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--callcommand refRoot/cpu/setPMA -lo 0x0010040000 -hi 0x0010040FFF -attributes " rw-aA- --4- " # SPI error - 0x10040000 - 0x10040FFF
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--callcommand refRoot/cpu/setPMA -lo 0x0010000000 -hi 0x0010000007 -attributes " rw-aA- 1--- " # UART0
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--callcommand refRoot/cpu/setPMA -lo 0x0010060000 -hi 0x00100600FF -attributes " rw-aA- --4- " # GPIO
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--callcommand refRoot/cpu/setPMA -lo 0x0010040000 -hi 0x0010040FFF -attributes " rw-aA- --4- " # SPI
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--callcommand refRoot/cpu/setPMA -lo 0x0080000000 -hi 0x008FFFFFFF -attributes " rwx--- 1248 " # UNCORE_RAM
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# Enable the Imperas instruction coverage
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5
examples/exercises/16p1/antimul.sh
Executable file
5
examples/exercises/16p1/antimul.sh
Executable file
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@ -0,0 +1,5 @@
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#!/bin/sh
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sed -i 's/assign MFunctD.*/assign MFunctD = 0; \/\/ *** Replace with your logic/' $WALLY/src/ieu/controller.sv
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sed -i 's/ControlsD.*Divide/assign ControlsD = 0; \/\/ *** Replace with your logic/' $WALLY/src/ieu/controller.sv
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sed -zi 's/\/\/ Number systems.*logic/ logic/' $WALLY/src/mdu/mul.sv
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sed -zi 's/assign Aprime.*Memory/\/\/ Memory/' $WALLY/src/mdu/mul.sv
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@ -77,7 +77,7 @@ void genCase(FILE *fptr, float16_t x, float16_t y, float16_t z, int mul, int add
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float16_t resultmag = result;
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resultmag.v &= 0x7FFF; // take absolute value
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if (f16_lt(resultmag, smallest) && (resultmag.v != 0x0000)) fprintf (fptr, "// skip denorm: ");
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if ((softfloat_exceptionFlags) >> 1 % 2) fprintf(fptr, "// skip underflow: ");
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if ((softfloat_exceptionFlags >> 1) % 2) fprintf(fptr, "// skip underflow: ");
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// skip special cases if requested
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if (resultmag.v == 0x0000 && !zeroAllowed) fprintf(fptr, "// skip zero: ");
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@ -127,7 +127,6 @@ add wave -noupdate -group ifu -expand -group icache -expand -group lru /testbenc
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add wave -noupdate -group ifu -expand -group icache -expand -group lru /testbench/dut/core/ifu/bus/icache/icache/vict/cacheLRU/LRUMemory
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add wave -noupdate -group ifu -expand -group icache /testbench/dut/core/ifu/bus/icache/icache/SelAdrTag
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add wave -noupdate -group ifu -expand -group icache /testbench/dut/core/ifu/bus/icache/icache/AdrSelMuxSelTag
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add wave -noupdate -group ifu -expand -group icache /testbench/dut/core/ifu/bus/icache/icache/vict/cacheLRU/CacheSetTag
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add wave -noupdate -group ifu -expand -group icache /testbench/dut/core/ifu/bus/icache/icache/vict/cacheLRU/PAdr
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add wave -noupdate -group ifu -expand -group icache -group way3 {/testbench/dut/core/ifu/bus/icache/icache/CacheWays[3]/SelectedWriteWordEn}
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add wave -noupdate -group ifu -expand -group icache -group way3 -label tag {/testbench/dut/core/ifu/bus/icache/icache/CacheWays[3]/CacheTagMem/ram/RAM}
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@ -674,15 +673,8 @@ add wave -noupdate -group spi /testbench/dut/uncoregen/uncore/spi/spi/ChipSelect
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add wave -noupdate -group spi /testbench/dut/uncoregen/uncore/spi/spi/SckMode
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add wave -noupdate /testbench/dut/uncoregen/uncore/spi/spi/ShiftEdge
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add wave -noupdate /testbench/dut/uncoregen/uncore/spi/spi/TransmitData
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add wave -noupdate /testbench/loggers/ICacheLogger/HitMissString
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add wave -noupdate /testbench/loggers/ICacheLogger/Enable
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add wave -noupdate /testbench/dut/core/ifu/bus/icache/icache/cachefsm/CacheEn
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add wave -noupdate /testbench/dut/core/ifu/bus/icache/icache/cachefsm/FlushStage
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add wave -noupdate -expand -group {Dcache logger} /testbench/loggers/DCacheLogger/HitMissString
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add wave -noupdate -expand -group {Dcache logger} /testbench/loggers/DCacheLogger/AccessTypeString
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add wave -noupdate -expand -group {Dcache logger} /testbench/loggers/DCacheLogger/resetD
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add wave -noupdate -expand -group {Dcache logger} /testbench/loggers/DCacheLogger/resetEdge
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add wave -noupdate -expand -group {Dcache logger} -color Pink /testbench/loggers/DCacheLogger/Enabled
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add wave -noupdate /testbench/dut/core/lsu/bus/dcache/dcache/vict/cacheLRU/LRUWriteEn
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add wave -noupdate /testbench/dut/core/lsu/bus/dcache/dcache/vict/cacheLRU/FlushStage
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TreeUpdate [SetDefaultTree]
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@ -119,7 +119,7 @@ module controller import cvw::*; #(parameter cvw_t P) (
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logic CMOD; // Cache management instruction
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logic InvalidateICacheD, FlushDCacheD;// Invalidate I$, flush D$
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logic MemReadE, CSRReadE; // Instruction reads memory, reads a CSR (needed for Hazard unit)
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logic MDUE; // MDU (multiply/divide) operatio
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logic MDUE; // MDU (multiply/divide) operation
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logic SCE; // Store Conditional instruction
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logic CSRWriteD, CSRWriteE; // CSR write
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logic PrivilegedD, PrivilegedE; // Privileged instruction
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@ -275,7 +275,7 @@ module controller import cvw::*; #(parameter cvw_t P) (
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7'b0110011: if (RFunctD)
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ControlsD = `CTRLW'b1_000_00_00_000_0_1_0_0_0_0_0_0_0_00_0_0; // R-type
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else if (MFunctD)
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ControlsD = `CTRLW'b1_000_00_00_011_0_0_0_0_0_0_0_0_1_00_0_0; // Multiply/divide
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ControlsD = `CTRLW'b1_000_00_00_011_0_0_0_0_0_0_0_0_1_00_0_0; // Multiply/Divide
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7'b0110111: ControlsD = `CTRLW'b1_100_01_00_000_0_0_0_1_0_0_0_0_0_00_0_0; // lui
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7'b0111011: if (RWFunctD)
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ControlsD = `CTRLW'b1_000_00_00_000_0_1_0_0_1_0_0_0_0_00_0_0; // R-type W instructions for RV64i
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@ -167,56 +167,56 @@ label1:
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.align 16
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# root Page table situated at 0x80010000
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pagetable:
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.8byte 0x200044C1 # 0x00000000-0x80_00000000: PTE at 0x80011000 C1 dirty, accessed, valid
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.8byte 0x00000000000010CF # misaligned terapage at 0x80_00000000
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.8byte 0x20004401 # 0x00000000-0x80_00000000: PTE at 0x80011000 01 valid
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.8byte 0x000000000000100F # misaligned terapage at 0x80_00000000
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# next page table at 0x80011000
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.align 12
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.8byte 0x00000000000010CF # misaligned gigapage at 0x00000000
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.8byte 0x00000000200058C1 # PTE for pages at 0x40000000
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.8byte 0x00000000200048C1 # gigapage at 0x80000000 pointing to 0x80120000
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.8byte 0x000000000000100F # misaligned gigapage at 0x00000000
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.8byte 0x0000000020005801 # PTE for pages at 0x40000000
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.8byte 0x0000000020004801 # gigapage at 0x80000000 pointing to 0x80120000
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# Next page table at 0x80012000 for gigapage at 0x80000000
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.align 12
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.8byte 0x0000000020004CC1 # for VA starting at 80000000 (pointer to NAPOT 64 KiB pages)
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.8byte 0x0000000020014CCF # for VA starting at 80200000 (misaligned megapage)
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.8byte 0x00000000200050C1 # for VA starting at 80400000 (bad PBMT pages)
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.8byte 0x4000000020004CC1 # for VA starting at 80600000 (bad entry: nonleaf PTE can't have PBMT != 0)
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.8byte 0x00000000200054C1 # for VA starting at 80800000 (testing rwx permissiosn with cbom/cboz)
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.8byte 0x00000000200058C1 # for VA starting at 80A00000 (pointer to NAPOT 64 KiB pages like at 80000000)
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004C01 # for VA starting at 80000000 (pointer to NAPOT 64 KiB pages)
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.8byte 0x0000000020014C0F # for VA starting at 80200000 (misaligned megapage)
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.8byte 0x0000000020005001 # for VA starting at 80400000 (bad PBMT pages)
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.8byte 0x4000000020004C01 # for VA starting at 80600000 (bad entry: nonleaf PTE can't have PBMT != 0)
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.8byte 0x0000000020005401 # for VA starting at 80800000 (testing rwx permissiosn with cbom/cboz)
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.8byte 0x0000000020005801 # for VA starting at 80A00000 (pointer to NAPOT 64 KiB pages like at 80000000)
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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.8byte 0x0000000020004C01
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# Leaf page table at 0x80013000 with NAPOT pages
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.align 12
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@ -64,16 +64,16 @@ finished:
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.align 16
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# Page table situated at 0x80010000
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pagetable:
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.8byte 0x200044C1 // old page table was 200040 which just pointed to itself! wrong
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.8byte 0x20004401 // old page table was 200040 which just pointed to itself! wrong
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.align 12
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.8byte 0x0000000000000000
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.8byte 0x00000000200048C1
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.8byte 0x00000000200048C1
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.8byte 0x0000000020004801
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.8byte 0x0000000020004801
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.align 12
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004C01
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//.8byte 0x00000200800CF// ADD IN THE MEGAPAGE should 3 nibbles of zeros be removed?
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.align 12
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@ -60,17 +60,17 @@ finished:
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.align 16
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# Page table situated at 0x80010000
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pagetable:
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.8byte 0x200044C1
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.8byte 0x200044C1
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.8byte 0x20004401
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.8byte 0x20004401
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.align 12
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.8byte 0x40000040200048C1
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.8byte 0x00000000200048C1
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.8byte 0x00000000200048C1
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.8byte 0x4000004020004801
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.8byte 0x0000000020004801
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.8byte 0x0000000020004801
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.align 12
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.8byte 0x0000000020004CC1
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.8byte 0x0000000020004C01
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.align 12
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#80000000
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@ -73,16 +73,16 @@ finished:
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.align 19
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# level 3 Page table situated at 0x8008 0000, should point to 8008,1000
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pagetable:
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.8byte 0x200204C1
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.8byte 0x20020401
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.align 12 // level 2 page table, contains direction to a gigapage
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.8byte 0x0
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.8byte 0x0
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.8byte 0x200000CF // gigapage that starts at 8000 0000 goes to C000 0000
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.8byte 0x200208C1 // pointer to next page table entry at 8008 2000
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.8byte 0x20020801 // pointer to next page table entry at 8008 2000
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.align 12 // level 1 page table, points to level 0 page table
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.8byte 0x20020CC1
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.8byte 0x20020C01
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.align 12 // level 0 page table, points to address C000 0000 // FOR NOW ALL OF THESE GO TO 8 instead of C cause they start with 2
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.8byte 0x200000CF // access xC000 0000
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@ -83,16 +83,16 @@ nASID: #swap to different address space -> jump to each address
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.align 19
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# level 3 Page table situated at 0x8008 0000, should point to 8008,1000
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pagetable:
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.8byte 0x200204C1
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.8byte 0x20020401
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.align 12 // level 2 page table, contains direction to a gigapageg
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.8byte 0x0
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.8byte 0x0
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.8byte 0x200000EF // gigapage that starts at 8000 0000 goes to C000 0000
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.8byte 0x200208E1 // pointer to next page table entry at 8008 2000
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.8byte 0x20020821 // pointer to next page table entry at 8008 2000
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.align 12 // level 1 page table, points to level 0 page table
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.8byte 0x20020CE1
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.8byte 0x20020C21
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.align 12 // level 0 page table, points to address C000 0000 // FOR NOW ALL OF THESE GO TO 8 instead of C cause they start with 2
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.8byte 0x200000EF // access xC000 0000
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@ -64,7 +64,7 @@ finished:
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.align 16
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# Page table situated at 0x80010000
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pagetable:
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.8byte 0x200044C1
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.8byte 0x20004401
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.align 12
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.8byte 0x000000CF //8000 0000
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@ -69,17 +69,17 @@ finished:
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.align 16
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# Page table situated at 0x80010000
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pagetable:
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.8byte 0x200044C1
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.8byte 0x20004401
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.align 12
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.8byte 0x00000000200048C1
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.8byte 0x00000000200048C1
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.8byte 0x00000000200048C1
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.8byte 0x0000000020004801
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.8byte 0x0000000020004801
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.8byte 0x0000000020004801
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.align 12
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.8byte 0x0000000020004CC1
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//.8byte 0x00000200800CF// ADD IN THE MEGAPAGE should 3 nibbles of zeros be removed?
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.8byte 0x0000000020004C01
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//.8byte 0x000002008000F// ADD IN THE MEGAPAGE should 3 nibbles of zeros be removed?
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.align 12
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#80000000
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