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Checked in fma16_template.v

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This commit is contained in:
David Harris 2022-03-06 13:29:35 +00:00
parent d24178aa34
commit d2282d5e87
2 changed files with 25 additions and 1 deletions
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2
examples/fp/fpcalc/fpcalc.c
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@ -128,7 +128,7 @@ void printF64(char *msg, float64_t f) {
printf("_");
printf("%04x", (conv.v >> 32) & 0xFFFF);
printf("_");
printf("%04x", (conv.v >> 16));
printf("%04x", (conv.v >> 16) & 0xFFFF);
printf("_");
printf("%04x", (conv.v & 0xFFFF));
printf(" = %lg = %s: Biased Exp %d Fract 0x%lx\n", conv.d, sci, exp, fract);

24
pipelined/src/fma/fma16_template.v Normal file
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@ -0,0 +1,24 @@
// fma16.sv
// David_Harris@hmc.edu 26 February 2022
// 16-bit floating-point multiply-accumulate
// Operation: general purpose multiply, add, fma, with optional negation
// If mul=1, p = x * y. Else p = x.
// If add=1, result = p + z. Else result = p.
// If negr or negz = 1, negate result or z to handle negations and subtractions
// fadd: mul = 0, add = 1, negr = negz = 0
// fsub: mul = 0, add = 1, negr = 0, negz = 1
// fmul: mul = 1, add = 0, negr = 0, negz = 0
// fmadd: mul = 1, add = 1, negr = 0, negz = 0
// fmsub: mul = 1, add = 1, negr = 0, negz = 1
// fnmadd: mul = 1, add = 1, negr = 1, negz = 0
// fnmsub: mul = 1, add = 1, negr = 1, negz = 1
module fma16(
input logic [15:0] x, y, z,
input logic mul, add, negr, negz,
input logic [1:0] roundmode, // 00: rz, 01: rne, 10: rp, 11: rn
output logic [15:0] result);
endmodule