Updated Arty A7 fpga config and device tree to 256MiB main memory.

This commit is contained in:
Ross Thompson 2023-07-25 15:11:47 -05:00
parent 0ae9e8bfde
commit dbf9e5da0b
2 changed files with 4 additions and 4 deletions

View file

@ -112,7 +112,7 @@ localparam logic [63:0] UNCORE_RAM_RANGE = 64'h00000FFF;
localparam EXT_MEM_SUPPORTED = 1'b1;
localparam logic [63:0] EXT_MEM_BASE = 64'h80000000;
localparam logic [63:0] EXT_MEM_RANGE = 64'h07FFFFFF;
localparam logic [63:0] EXT_MEM_RANGE = 64'h0FFFFFFF;
localparam CLINT_SUPPORTED = 1'b1;
localparam logic [63:0] CLINT_BASE = 64'h02000000;

View file

@ -15,7 +15,7 @@
memory@80000000 {
device_type = "memory";
reg = <0x00 0x80000000 0x00 0x08000000>;
reg = <0x00 0x80000000 0x00 0x10000000>;
};
cpus {
@ -75,10 +75,10 @@
bus-width = <4>;
interrupt-parent = <0x03>;
clock = <0x1312D00>;
max-frequency = <0xA7D8C0>;
max-frequency = <0x1312D00>;
cap-sd-highspeed;
cap-mmc-highspeed;
no-sdio;
sdio;
};
clint@2000000 {