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Increase ulimit for verilator
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@ -35,7 +35,7 @@ export RISCV_OBJCOPY=$(which riscv64-unknown-elf-objcopy) # Copy this as
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export SPIKE_PATH=$RISCV/bin # Change this for your path to riscv-isa-sim (spike)
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# Verilator needs a larger stack to simulate CORE-V Wally
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ulimit -c 234613
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ulimit -c 300000
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# Imperas OVPsim; put this in if you are using it
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#export PATH=$RISCV/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64:$PATH
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