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Kevin Kim 2024-06-21 23:15:34 -07:00
parent 4877633977
commit eeea783da0
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src/fpu/fdivsqrt/fdivsqrtpostproc.sv
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@ -45,7 +45,7 @@ module fdivsqrtpostproc import cvw::*; #(parameter cvw_t P) (
output logic [P.XLEN-1:0] FIntDivResultM // U/Q(XLEN.0)
);
logic [P.DIVb+3:0] um, Sum;
logic [P.DIVb+3:0] Sum;
logic [P.INTDIVb+3:0] W;
logic [P.DIVb:0] PreUmM;
logic NegStickyM;