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Added performance new counter prints to testbench.

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This commit is contained in:
Ross Thompson 2023-03-03 10:42:52 -06:00
parent 17adba5fd5
commit f6e97cf516
1 changed files with 125 additions and 136 deletions
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45
testbench/testbench.sv
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@ -268,9 +268,6 @@ logic [3:0] dummy;
// if ($time % 100000 == 0) $display("Time is %0t", $time); // if ($time % 100000 == 0) $display("Time is %0t", $time);
end end
logic [`XLEN-1:0] debugmemoryadr;
// assign debugmemoryadr = dut.uncore.uncore.ram.ram.memory.RAM[5140];
// check results // check results
assign reset_ext = InReset; assign reset_ext = InReset;
@ -409,19 +406,29 @@ logic [3:0] dummy;
string HPMCnames[] = '{"Mcycle", string HPMCnames[] = '{"Mcycle",
"------", "------",
"InstRet", "InstRet",
"Load Stall",
"Br Dir Wrong",
"Br Count", "Br Count",
"Br Target Wrong",
"Jump, JR, Jal", "Jump, JR, Jal",
"Return",
"Br Dir Wrong",
"Br Pred Wrong",
"Br Target Wrong",
"RAS Wrong", "RAS Wrong",
"ret",
"Instr Class Wrong", "Instr Class Wrong",
"Load Stall",
"Store Stall",
"D Cache Access", "D Cache Access",
"D Cache Miss", "D Cache Miss",
"D Cache Cycles",
"I Cache Access", "I Cache Access",
"I Cache Miss", "I Cache Miss",
"Br Pred Wrong"}; "I Cache Cycles",
"CSR Write",
"FenceI",
"SFenceVMA",
"Interrupt",
"Exception",
"Divide Cycles"
};
always @(negedge clk) begin always @(negedge clk) begin
if(DCacheFlushStart & ~DCacheFlushDone) begin if(DCacheFlushStart & ~DCacheFlushDone) begin
for(HPMCindex = 0; HPMCindex < HPMCnames.size(); HPMCindex += 1) begin for(HPMCindex = 0; HPMCindex < HPMCnames.size(); HPMCindex += 1) begin
@ -487,32 +494,14 @@ logic [3:0] dummy;
if (`BPRED_SUPPORTED == 1) begin if (`BPRED_SUPPORTED == 1) begin
/* -----\/----- EXCLUDED -----\/-----
genvar adrindex;
// Initializing all zeroes into the branch predictor memory.
for(adrindex = 0; adrindex < 2**`BTB_SIZE; adrindex++) begin
initial begin
force dut.core.ifu.bpred.bpred.TargetPredictor.memory.mem[adrindex] = 0;
#1;
release dut.core.ifu.bpred.bpred.TargetPredictor.memory.mem[adrindex];
end
end
for(adrindex = 0; adrindex < 2**`BPRED_SIZE; adrindex++) begin
initial begin
force dut.core.ifu.bpred.bpred.Predictor.DirPredictor.PHT.mem[adrindex] = 0;
#1;
release dut.core.ifu.bpred.bpred.Predictor.DirPredictor.PHT.mem[adrindex];
end
end
-----/\----- EXCLUDED -----/\----- */
if (`BPRED_LOGGER) begin if (`BPRED_LOGGER) begin
string direction; string direction;
int file; int file;
logic PCSrcM; logic PCSrcM;
flopenrc #(1) PCSrcMReg(clk, reset, dut.core.FlushM, ~dut.core.StallM, dut.core.ifu.bpred.bpred.Predictor.DirPredictor.PCSrcE, PCSrcM); flopenrc #(1) PCSrcMReg(clk, reset, dut.core.FlushM, ~dut.core.StallM, dut.core.ifu.bpred.bpred.Predictor.DirPredictor.PCSrcE, PCSrcM);
initial initial begin
file = $fopen("branch.log", "w"); file = $fopen("branch.log", "w");
end
always @(posedge clk) begin always @(posedge clk) begin
if(dut.core.ifu.InstrClassM[0] & ~dut.core.StallW & ~dut.core.FlushW & dut.core.InstrValidM) begin if(dut.core.ifu.InstrClassM[0] & ~dut.core.StallW & ~dut.core.FlushW & dut.core.InstrValidM) begin
direction = PCSrcM ? "t" : "n"; direction = PCSrcM ? "t" : "n";