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[rtl] Avoid latch creation

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Following Verilator warning set default value to avoid the creation of a
latch.
This commit is contained in:
Tobias Wölfel 2021-01-09 15:25:26 +01:00 • committed by Tobias Wölfel
parent 90c78203cc
commit 0f2dc5c64a
2 changed files with 3 additions and 0 deletions
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1
dv/riscv_compliance/rtl/riscv_testutil.sv
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@ -116,6 +116,7 @@ module riscv_testutil (
logic [31:0] read_addr_d, read_addr_q;
always_comb begin
state_d = state_q;
read_addr_d = read_addr_q;
unique case (state_q)
WAIT: begin
if (read_signature_and_terminate) begin

2
shared/rtl/bus.sv
View file

@ -59,6 +59,7 @@ module bus #(
// Master select prio arbiter
always_comb begin
host_sel_req = '0;
for (integer host = NrHosts - 1; host >= 0; host = host - 1) begin
if (host_req_i[host]) begin
host_sel_req = NumBitsHostSel'(host);
@ -68,6 +69,7 @@ module bus #(
// Device select
always_comb begin
device_sel_req = '0;
for (integer device = 0; device < NrDevices; device = device + 1) begin
if ((host_addr_i[host_sel_req] & cfg_device_addr_mask[device])
== cfg_device_addr_base[device]) begin