github-mirrors/ibex
1
0
Fork 0
mirror of https://github.com/lowRISC/ibex.git synced 2025-04-22 21:07:34 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

[rtl, dv] Add new CSRs for latest priviledged spec

Browse source 
This adds the following CSRs to support the v1.12 priviledged spec.

 - MSTATUSH
 - MCONFIGPTR
 - MENVCFG
 - MENVCFGH

MCONFIGPTR is read only and has its value provided by a ibex_pkg
parameter CSR_MCONFIGPTR_VALUE which is set to 0. Implementors can alter
this value if needed.

All the other CSRs ignore writes and read as 0.
This commit is contained in:
Greg Chadwick 2022-09-06 21:05:04 +01:00 • committed by Greg Chadwick
parent c30f7f98bd
commit 1d0344eb89
4 changed files with 30 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

3
dv/uvm/core_ibex/riscv_dv_extension/ibex_asm_program_gen.sv
View file

@ -17,6 +17,9 @@ class ibex_asm_program_gen extends riscv_asm_program_gen;
MVENDORID,
MARCHID,
MHARTID,
MCONFIGPTR,
MENVCFG,
MSTATUSH,
MIMPID,
MCYCLE,
MCYCLEH,

5
dv/uvm/core_ibex/riscv_dv_extension/riscv_core_setting.tpl.sv
View file

@ -120,7 +120,10 @@ const privileged_reg_t implemented_csr[] = {
MIMPID, // Implementation ID
MARCHID, // Architecture ID
MHARTID, // Hardware thread ID
MSTATUS, // Machine status
MCONFIGPTR, // Machine configuration pointer
MENVCFG, // Machine environment configuration (lower 32 bits)
MSTATUS, // Machine status (lower 32 bits)
MSTATUSH, // Machine status (upper 32 bits)
MISA, // ISA and extensions
MTVEC, // Machine trap-handler base address
MEPC, // Machine exception program counter

9
rtl/ibex_cs_registers.sv
View file

@ -330,6 +330,8 @@ module ibex_cs_registers #(
CSR_MIMPID: csr_rdata_int = CSR_MIMPID_VALUE;
// mhartid: unique hardware thread id
CSR_MHARTID: csr_rdata_int = hart_id_i;
// mconfigptr: pointer to configuration data structre
CSR_MCONFIGPTR: csr_rdata_int = CSR_MCONFIGPTR_VALUE;
// mstatus: always M-mode, contains IE bit
CSR_MSTATUS: begin
@ -341,6 +343,13 @@ module ibex_cs_registers #(
csr_rdata_int[CSR_MSTATUS_TW_BIT] = mstatus_q.tw;
end
// mstatush: All zeros for Ibex (fixed little endian and all other bits reserved)
CSR_MSTATUSH: csr_rdata_int = '0;
// menvcfg: machine environment configuration, all zeros for Ibex (none of the relevant
// features are implemented)
CSR_MENVCFG, CSR_MENVCFGH: csr_rdata_int = '0;
// misa
CSR_MISA: csr_rdata_int = MISA_VALUE;

18
rtl/ibex_pkg.sv
View file

@ -425,10 +425,11 @@ package ibex_pkg;
// CSRs
typedef enum logic[11:0] {
// Machine information
CSR_MVENDORID = 12'hF11,
CSR_MARCHID = 12'hF12,
CSR_MIMPID = 12'hF13,
CSR_MHARTID = 12'hF14,
CSR_MVENDORID = 12'hF11,
CSR_MARCHID = 12'hF12,
CSR_MIMPID = 12'hF13,
CSR_MHARTID = 12'hF14,
CSR_MCONFIGPTR = 12'hF15,
// Machine trap setup
CSR_MSTATUS = 12'h300,
@ -436,6 +437,10 @@ package ibex_pkg;
CSR_MIE = 12'h304,
CSR_MTVEC = 12'h305,
CSR_MCOUNTEREN= 12'h306,
CSR_MSTATUSH = 12'h310,
CSR_MENVCFG = 12'h30A,
CSR_MENVCFGH = 12'h31A,
// Machine trap handling
CSR_MSCRATCH = 12'h340,
@ -627,6 +632,11 @@ package ibex_pkg;
// commit).
localparam logic [31:0] CSR_MIMPID_VALUE = 32'b0;
// Machine Configuration Pointer
// 0 indicates the configuration data structure does not eixst. Ibex implementors may wish to
// alter this to point to their system specific configuration data structure.
localparam logic [31:0] CSR_MCONFIGPTR_VALUE = 32'b0;
// These LFSR parameters have been generated with
// $ opentitan/util/design/gen-lfsr-seed.py --width 32 --seed 2480124384 --prefix ""
parameter int LfsrWidth = 32;