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Disabled simchecker per default again

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This commit is contained in:
Andreas Traber 2016-03-23 13:38:00 +01:00
parent a45273acc6
commit 1f2eef7606
1 changed files with 1 additions and 1 deletions
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2
include/riscv_defines.sv
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@ -29,7 +29,7 @@
// no traces for synthesis, they are not synthesizable
`ifndef SYNTHESIS
`define TRACE_EXECUTION
`define SIMCHECKER
//`define SIMCHECKER
`endif