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[lint] Remove whitespace from non-vendored source files

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Signed-off-by: Marno van der Maas <mvdmaas+git@lowrisc.org>
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Marno van der Maas 2022-07-11 14:46:23 +01:00 • committed by Marno van der Maas
parent 7ba6667f32
commit 3459d7f8df
3 changed files with 3 additions and 3 deletions
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2
doc/03_reference/icache.rst
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@ -96,7 +96,7 @@ Indicative RAM sizes for common configurations are given in the table below:
If ICacheScramble parameter is enabled, all RAM primitives are replaced with scrambling RAM primitive.
For more information about how scrambling works internally (see :file:`vendor/lowrisc_ip/ip/prim/doc/prim_ram_1p_scr.md`).
Interface for receiving scrambling key follows req / ack protocol.
Ibex first requests a new ephemeral key by asserting the request (``scramble_req_o``) and when a fresh valid key is indicated by ``scramble_key_valid_i``, it deasserts the request.
Ibex first requests a new ephemeral key by asserting the request (``scramble_req_o``) and when a fresh valid key is indicated by ``scramble_key_valid_i``, it deasserts the request.
Note that in current implementation, it is assumed req/ack protocol is synchronized before arriving to Ibex top level.
Sub Unit Description

2
dv/uvm/icache/dv/env/ibex_icache_scoreboard.sv vendored
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@ -427,7 +427,7 @@ class ibex_icache_scoreboard
bit [BusWidth-1:0] rdata;
bit [31:0] seed;
int unsigned mem_err_shift;
int unsigned mem_err_shift;
bus_shift = $clog2(BusWidth / 8);
addr_lo = (address >> bus_shift) << bus_shift;

2
examples/fpga/artya7/top_artya7.core
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@ -41,7 +41,7 @@ parameters:
datatype: str
paramtype: vlogdefine
description: Primitives implementation to use, e.g. "prim_pkg::ImplGeneric".
FPGAPowerAnalysis:
datatype: int
paramtype: vlogparam