Update google_riscv-dv to google/riscv-dv@44bec76 (#447)

Update code from upstream repository https://github.com/google/riscv-
dv to revision 44bec7695fd2399166e181fa84b66a608b5f745f

* Re-enable custom OVPsim configuration files (google/riscv-dv#282)
  (udinator)

vendor/google_riscv-dv.lock.hjson

@@ -9,6 +9,6 @@
   upstream:
   {
     url: https://github.com/google/riscv-dv
-    rev: cce71d24b56f641d994fbf69b8b50aa3756b9322
+    rev: 44bec7695fd2399166e181fa84b66a608b5f745f
   }
 }

vendor/google_riscv-dv/run.py

@@ -93,7 +93,10 @@ def parse_iss_yaml(iss, iss_yaml, isa, setting_dir):
       logging.info("Found matching ISS: %s" % entry['iss'])
       cmd = entry['cmd'].rstrip()
       cmd = re.sub("\<path_var\>", get_env_var(entry['path_var']), cmd)
-      cmd = re.sub("\<variant\>", isa, cmd)
+      if iss == "ovpsim":
+        cmd = re.sub("\<cfg_path\>", setting_dir, cmd)
+      else:
+        cmd = re.sub("\<variant\>", isa, cmd)
       return cmd
   logging.error("Cannot find ISS %0s" % iss)
   sys.exit(1)

vendor/google_riscv-dv/yaml/iss.yaml

@@ -21,7 +21,7 @@
   path_var: OVPSIM_PATH
   cmd: >
     <path_var>/riscvOVPsim.exe
-    --controlfile target/<variant>/riscvOVPsim.ic
+    --controlfile <cfg_path>/riscvOVPsim.ic
     --objfilenoentry <elf>
     --override riscvOVPsim/cpu/PMP_registers=0
     --override riscvOVPsim/cpu/simulateexceptions=T