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Improve config scripts to not use small IF as it is bigger

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This commit is contained in:
Markus Wegmann 2017-01-10 10:14:17 +01:00
parent c6f2cacb30
commit 6510bd3b65
17 changed files with 11 additions and 43 deletions
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4
include/riscv_config.sv
View file

@ -99,7 +99,7 @@
// CONFIG: SMALL_IF
// will disable large FIFO in IF stage and use a more simple one.
`define SMALL_IF
//`define SMALL_IF
// CONFIG: RV32E
// will reduce the register file to 16 words
@ -120,13 +120,11 @@
// will merge/fuse the ID and EX stage
`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

2
scripts/example_configs/00_all_features_enabled.sv
View file

@ -119,13 +119,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

2
scripts/example_configs/01_no_mul.sv
View file

@ -119,13 +119,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

2
scripts/example_configs/02_no_mul_no_vec.sv
View file

@ -123,13 +123,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

2
scripts/example_configs/03_no_mul_no_vec_no_hwlp.sv
View file

@ -119,13 +119,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

2
scripts/example_configs/04_no_mul_no_vec_no_hwlp_no_bit.sv
View file

@ -119,13 +119,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

2
scripts/example_configs/05_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost.sv
View file

@ -119,13 +119,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

2
scripts/example_configs/06_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special.sv
View file

@ -119,13 +119,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

2
scripts/example_configs/07_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs.sv
View file

@ -119,13 +119,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

2
scripts/example_configs/08_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu.sv
View file

@ -119,13 +119,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

2
scripts/example_configs/09_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif.sv
View file

@ -120,13 +120,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

9
scripts/example_configs/11_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_rv32e.sv → scripts/example_configs/10_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_no_jumpinid.sv
View file

@ -74,10 +74,9 @@
// will enable clip, min and max operations support.
//`define MATH_SPECIAL_SUPPORT
// CONFIG: JUMP_IN_ID
// will enable direct jump in ID. Might increase critical path of jump target.
`define JUMP_IN_ID
//`define JUMP_IN_ID
// Dependent definitions
@ -100,11 +99,11 @@
// CONFIG: SMALL_IF
// will disable large FIFO in IF stage and use a more simple one.
`define SMALL_IF
//`define SMALL_IF
// CONFIG: RV32E
// will reduce the register file to 16 words
`define RV32E
//`define RV32E
// CONFIG: ONLY_ALIGNED
// will only allow aligned memory accesses and therefore overlapping mustn't occur
@ -120,13 +119,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

5
scripts/example_configs/10_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_no_jumpinid.sv → scripts/example_configs/11_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_no_jumpinid_rv32e.sv
View file

@ -74,6 +74,7 @@
// will enable clip, min and max operations support.
//`define MATH_SPECIAL_SUPPORT
// CONFIG: JUMP_IN_ID
// will enable direct jump in ID. Might increase critical path of jump target.
//`define JUMP_IN_ID
@ -99,11 +100,11 @@
// CONFIG: SMALL_IF
// will disable large FIFO in IF stage and use a more simple one.
`define SMALL_IF
//`define SMALL_IF
// CONFIG: RV32E
// will reduce the register file to 16 words
//`define RV32E
`define RV32E
// CONFIG: ONLY_ALIGNED
// will only allow aligned memory accesses and therefore overlapping mustn't occur

4
scripts/example_configs/12_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_with_smallif_rv32e_with_splittedadder.sv → scripts/example_configs/12_no_mul_no_vec_no_hwlp_no_bit_no_lsuadder_no_prepost_no_special_no_3r2wregs_with_simplealu_rv32e_with_splittedadder.sv
View file

@ -100,7 +100,7 @@
// CONFIG: SMALL_IF
// will disable large FIFO in IF stage and use a more simple one.
`define SMALL_IF
//`define SMALL_IF
// CONFIG: RV32E
// will reduce the register file to 16 words
@ -120,13 +120,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

4
scripts/example_configs/13_rv32e_merged_pipeline.sv
View file

@ -99,7 +99,7 @@
// CONFIG: SMALL_IF
// will disable large FIFO in IF stage and use a more simple one.
`define SMALL_IF
//`define SMALL_IF
// CONFIG: RV32E
// will reduce the register file to 16 words
@ -119,13 +119,11 @@
// will merge/fuse the ID and EX stage
`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

4
scripts/example_configs/14_rv32e_merged_pipeline_only_aligned.sv
View file

@ -98,7 +98,7 @@
// CONFIG: SMALL_IF
// will disable large FIFO in IF stage and use a more simple one.
`define SMALL_IF
//`define SMALL_IF
// CONFIG: RV32E
// will reduce the register file to 16 words
@ -118,13 +118,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
//`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif

4
scripts/example_configs/15_rv32e_merged_pipeline_only_aligned_no_jumpadder.sv
View file

@ -98,7 +98,7 @@
// CONFIG: SMALL_IF
// will disable large FIFO in IF stage and use a more simple one.
`define SMALL_IF
//`define SMALL_IF
// CONFIG: RV32E
// will reduce the register file to 16 words
@ -118,13 +118,11 @@
// will merge/fuse the ID and EX stage
//`define MERGE_ID_EX
`ifdef SMALL_IF
`ifdef MERGE_ID_EX
// CONFIG: NO_JUMP_ADDER
// will use ALU adder to calculate target and get return address from prefetcher
`define NO_JUMP_ADDER
`endif
`endif
`endif
`endif