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Set default littleRISCV setting to RV32E with misaligned access

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This commit is contained in:
Markus Wegmann 2017-01-04 14:09:44 +01:00
parent 044494845b
commit a696658a96
1 changed files with 4 additions and 0 deletions
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4
include/riscv_config.sv
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@ -101,6 +101,10 @@
// will reduce the register file to 16 words
`define RV32E
// CONFIG: ONLY_ALIGNED
// will only allow aligned memory accesses and therefore overlapping mustn't occur
//`define ONLY_ALIGNED
`endif
`endif
`endif