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https://github.com/lowRISC/ibex.git
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Remove FPGA example
Now ibex-demo-system is available the FPGA example in the Ibex repository has less use and risks causing confusion so remove it entirely.
This commit is contained in:
Greg Chadwick
Greg Chadwick
parent
b4ae5bbb30
commit
ac245b394f
10 changed files with 0 additions and 860 deletions
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@ -1,60 +0,0 @@
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# Copyright lowRISC contributors.
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# Licensed under the Apache License, Version 2.0, see LICENSE for details.
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# SPDX-License-Identifier: Apache-2.0
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#
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# Generate a baremetal application
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PROGRAM ?= led
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PROGRAM_CFLAGS = -Wall -g -Os
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ARCH = rv32imc
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# ARCH = rv32im # to disable compressed instructions
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SRCS = $(PROGRAM).c
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CC = riscv32-unknown-elf-gcc
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CROSS_COMPILE = $(patsubst %-gcc,%-,$(CC))
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OBJCOPY ?= $(CROSS_COMPILE)objcopy
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OBJDUMP ?= $(CROSS_COMPILE)objdump
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LINKER_SCRIPT ?= link.ld
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CRT ?= crt0.S
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CFLAGS ?= -march=$(ARCH) -mabi=ilp32 -static -mcmodel=medany \
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-fvisibility=hidden -nostdlib -nostartfiles $(PROGRAM_CFLAGS)
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OBJS := ${SRCS:.c=.o} ${CRT:.S=.o}
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DEPS = $(OBJS:%.o=%.d)
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OUTFILES = $(PROGRAM).elf $(PROGRAM).vmem $(PROGRAM).bin $(PROGRAM).dis
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all: $(OUTFILES)
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$(PROGRAM).elf: $(OBJS) $(LINKER_SCRIPT)
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$(CC) $(CFLAGS) -T $(LINKER_SCRIPT) $(OBJS) -o $@ $(LIBS)
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%.dis: %.elf
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$(OBJDUMP) -SD $^ > $@
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# Note: this target requires the srecord package to be installed.
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# XXX: This could be replaced by objcopy once
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# https://sourceware.org/bugzilla/show_bug.cgi?id=19921
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# is widely available.
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# XXX: Currently the start address 0x00000000 is hardcoded. It could/should be
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# read from the elf file, but is lost in the bin file.
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# Switching to objcopy will resolve that as well.
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%.vmem: %.bin
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srec_cat $^ -binary -offset 0x0000 -byte-swap 4 -o $@ -vmem
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%.bin: %.elf
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$(OBJCOPY) -O binary $^ $@
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%.o: %.c
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$(CC) $(CFLAGS) -MMD -c $(INCS) -o $@ $<
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%.o: %.S
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$(CC) $(CFLAGS) -MMD -c $(INCS) -o $@ $<
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clean:
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$(RM) -f *.o *.d
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distclean: clean
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$(RM) -f $(OUTFILES)
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@ -1,89 +0,0 @@
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.section .text
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default_exc_handler:
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jal x0, default_exc_handler
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reset_handler:
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/* set all registers to zero */
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mv x1, x0
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mv x2, x1
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mv x3, x1
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mv x4, x1
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mv x5, x1
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mv x6, x1
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mv x7, x1
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mv x8, x1
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mv x9, x1
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mv x10, x1
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mv x11, x1
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mv x12, x1
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mv x13, x1
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mv x14, x1
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mv x15, x1
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mv x16, x1
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mv x17, x1
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mv x18, x1
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mv x19, x1
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mv x20, x1
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mv x21, x1
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mv x22, x1
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mv x23, x1
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mv x24, x1
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mv x25, x1
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mv x26, x1
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mv x27, x1
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mv x28, x1
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mv x29, x1
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mv x30, x1
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mv x31, x1
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/* stack initilization */
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la x2, _stack_start
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_start:
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.global _start
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/* clear BSS */
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la x26, _bss_start
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la x27, _bss_end
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bge x26, x27, zero_loop_end
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zero_loop:
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sw x0, 0(x26)
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addi x26, x26, 4
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ble x26, x27, zero_loop
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zero_loop_end:
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main_entry:
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/* jump to main program entry point (argc = argv = 0) */
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addi x10, x0, 0
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addi x11, x0, 0
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jal x1, main
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/* =================================================== [ exceptions ] === */
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/* This section has to be down here, since we have to disable rvc for it */
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.section .vectors, "ax"
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.option norvc;
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// external interrupts are handled by the same callback
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// until compiler supports IRQ routines
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.org 0x00
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.rept 31
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nop
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.endr
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jal x0, default_exc_handler
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// reset vector
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.org 0x80
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jal x0, reset_handler
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// illegal instruction exception
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.org 0x84
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jal x0, default_exc_handler
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// ecall handler
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.org 0x88
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jal x0, default_exc_handler
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@ -1,47 +0,0 @@
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// Copyright lowRISC contributors.
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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#include <stdint.h>
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#define CLK_FIXED_FREQ_HZ (50ULL * 1000 * 1000)
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/**
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* Delay loop executing within 8 cycles on ibex
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*/
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static void delay_loop_ibex(unsigned long loops) {
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int out; /* only to notify compiler of modifications to |loops| */
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asm volatile(
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"1: nop \n" // 1 cycle
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" nop \n" // 1 cycle
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" nop \n" // 1 cycle
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" nop \n" // 1 cycle
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" addi %1, %1, -1 \n" // 1 cycle
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" bnez %1, 1b \n" // 3 cycles
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: "=&r" (out)
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: "0" (loops)
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);
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}
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static int usleep_ibex(unsigned long usec) {
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unsigned long usec_cycles;
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usec_cycles = CLK_FIXED_FREQ_HZ * usec / 1000 / 1000 / 8;
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delay_loop_ibex(usec_cycles);
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return 0;
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}
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static int usleep(unsigned long usec) {
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return usleep_ibex(usec);
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}
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int main(int argc, char **argv) {
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// The lowest four bits of the highest byte written to the memory region named
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// "stack" are connected to the LEDs of the board.
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volatile uint8_t *var = (volatile uint8_t *) 0x0000c010;
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*var = 0x0a;
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while (1) {
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usleep(1000 * 1000); // 1000 ms
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*var = ~(*var);
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}
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}
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@ -1,105 +0,0 @@
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OUTPUT_ARCH(riscv)
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/* required to correctly link newlib */
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GROUP( -lc -lgloss -lgcc -lsupc++ )
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SEARCH_DIR(.)
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__DYNAMIC = 0;
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MEMORY
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{
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rom : ORIGIN = 0x00000000, LENGTH = 0xC000 /* 48 kB */
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stack : ORIGIN = 0x0000C000, LENGTH = 0x4000 /* 16 kB */
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}
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/* Stack information variables */
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_min_stack = 0x2000; /* 8K - minimum stack space to reserve */
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_stack_len = LENGTH(stack);
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_stack_start = ORIGIN(stack) + LENGTH(stack);
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/* We have to align each sector to word boundaries as our current s19->slm
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* conversion scripts are not able to handle non-word aligned sections. */
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SECTIONS
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{
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.vectors :
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{
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. = ALIGN(4);
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KEEP(*(.vectors))
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} > rom
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.text : {
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. = ALIGN(4);
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_stext = .;
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*(.text)
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*(.text.*)
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_etext = .;
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__CTOR_LIST__ = .;
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LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
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*(.ctors)
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LONG(0)
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__CTOR_END__ = .;
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__DTOR_LIST__ = .;
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LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
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*(.dtors)
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LONG(0)
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__DTOR_END__ = .;
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*(.lit)
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*(.shdata)
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. = ALIGN(4);
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_endtext = .;
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} > rom
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.rodata : {
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. = ALIGN(4);
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*(.rodata);
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*(.rodata.*)
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} > rom
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.shbss :
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{
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. = ALIGN(4);
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*(.shbss)
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} > rom
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.data : {
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. = ALIGN(4);
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sdata = .;
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_sdata = .;
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*(.data);
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*(.data.*)
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edata = .;
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_edata = .;
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} > rom
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.bss :
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{
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. = ALIGN(4);
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_bss_start = .;
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*(.bss)
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*(.bss.*)
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*(.sbss)
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*(.sbss.*)
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*(COMMON)
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_bss_end = .;
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} > rom
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/* ensure there is enough room for stack */
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.stack (NOLOAD): {
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. = ALIGN(4);
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. = . + _min_stack ;
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. = ALIGN(4);
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stack = . ;
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_stack = . ;
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} > stack
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.stab 0 (NOLOAD) :
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{
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[ .stab ]
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}
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.stabstr 0 (NOLOAD) :
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{
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[ .stabstr ]
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}
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}
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