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Delete some Makefile variables that we're not using any more
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1 changed files with 1 additions and 11 deletions
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@ -105,16 +105,6 @@ sim: post_compare $(if $(filter 1,$(COV)),merge_cov,)
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clean:
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rm -rf $(OUT-DIR)
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# Common options for all targets
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COMMON_OPTS := $(if $(call equal,$(VERBOSE),1),--verbose,)
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# Options for all targets that depend on the tests we're running.
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TEST_OPTS := $(COMMON_OPTS) \
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--start_seed=${SEED} \
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--test="${TEST}" \
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--testlist=${TESTLIST} \
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--iterations=${ITERATIONS}
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# Options used for privileged CSR test generation
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CSR_OPTS=--csr_yaml=${CSR_FILE} \
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--isa="${ISA}" \
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@ -360,7 +350,7 @@ all-verilog = \
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$(shell find ../../../rtl -name '*.v' -o -name '*.sv' -o -name '*.svh') \
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$(shell find ../.. -name '*.v' -o -name '*.sv' -o -name '*.svh')
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tb-compile-var-deps := COMMON_OPTS SIMULATOR COV WAVES COSIM
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tb-compile-var-deps := SIMULATOR COV WAVES COSIM
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-include $(OUT-DIR)rtl_sim/.rtl.tb_compile.vars.mk
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tb-compile-vars-prereq = $(call vars-prereq,comp,compiling TB,$(tb-compile-var-deps))
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