- Add required signals to top-level
- Propagate error through fetch stages
- Add new exception type
- Update documentation for new exception type
- Resolves issue #109
This commit makes the BASE field of the `mtvec` CSR writable to
allow changing the trap-vector base address at runtime without
changing the boot address input. Similar to the boot address,
the trap-vector base address must always be aligned to 256 bytes.
At bootup, the trap-vector base address is initialized to the boot
address.
This commit resolveslowrisc/ibex#118.
Most of this work has been done by @ivanmgribeiro as part of
lowrisc/ibex#193.
Performance counters are an optional feature. Disable them by default to
avoid users having them enabled unknowingly and paying the (rather
large) area price for it.
