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2 commits

Author SHA1 Message Date
Tom Roberts
5bb41957ef [examples] Add timer example to simple system 
Not particularly useful in the current system, but gives an example of
how to handle interrupts.
 2020-01-10 10:18:09 +00:00
Greg Chadwick
2041f10c69 Added simple system 
Simple system is a basic verilator top-level testbench for running
 executables.  It has functionality for outputting text to a log file
 and for the software to terminate the simulation
 2019-11-09 07:48:47 +00:00