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16 commits

Author SHA1 Message Date
Rupert Swarbrick
508c4a29fb [doc] Describe counters more explicitly in simple_system README 2023-11-24 17:29:21 +00:00
Katharina
0264bcf2d4 Update README.md 
Describe how to produce a VCD trace file.
 2023-07-14 14:43:16 +00:00
fabian
bbc48a0c34 Add srecord as simple_system prerequisite 2022-02-09 09:33:07 +00:00
Rahul Raveendran
a4238bdd8d [doc/um] Updated the python requirements run command for sw simple system 
Signed-off-by: Rahul Raveendran <rahul.raveendran@acconeer.com>
 2021-01-11 11:28:56 +00:00
Pirmin Vogel
2ef5e5e3f2 Add a single RV32M enum parameter to select multiplier implementation 
This commit replaces the previous combination of `RV32M` bit parameter
used to en/disable the M extension and the `MultiplierImplementation`
used to select the multiplier implementation by a single enum parameter.

Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>
 2020-08-20 11:50:08 +02:00
Dawid Zimonczyk
14f85d3ee3 update readme for Riviera-PRO 2020-07-10 10:29:24 +01:00
Philipp Wagner
f688c79565 Clarifications to the README of the simple system 
* Mention the need to install `libelf-dev`. Thanks to Bert Pieters for
  reporting this.
* Guide users to install our Python dependencies, including fusesoc and
  edalize, from `python-requirements.txt`, to ensure they have the
  right version.
* Prefer ELF files for Verilator simulations. This makes it easier to
  use existing ELF files from another software build system.

Fixes #1019
 2020-07-07 15:35:55 +01:00
Rupert Swarbrick
a8cc0a9ef6 Get simple_system working for VCS 
This should probably work for Riviera-PRO too, but that hasn't been
tested.
 2020-07-03 15:42:39 +01:00
Rupert Swarbrick
91d7721fa9 Make exiting from simple_system tests work with Spike 2020-03-02 15:45:47 +00:00
Rupert Swarbrick
03efdaaf9e Tiny docs fix in examples/simple_system 
Missing "can" (which sounds a bit like a pirate!) and full stop.
 2020-02-27 11:26:57 +00:00
Greg Chadwick
3f0b730d57 [doc] Riviera-PRO instructions for Simple System 
Fixes #578

Signed-off-by: Greg Chadwick <gac@lowrisc.org>
 2020-02-05 11:40:01 +00:00
Philipp Wagner
f95518a46e Improve wording in README of simple system 
Small editorial fixes.
 2020-01-23 17:52:31 +00:00
Tom Roberts
5bb41957ef [examples] Add timer example to simple system 
Not particularly useful in the current system, but gives an example of
how to handle interrupts.
 2020-01-10 10:18:09 +00:00
Mehrdad Biglari
cead186836 Add Synopsys VCS Support for Ibex Simple System 
Add VCS to core description. Add stimuli. Fix compile error for assigmnet from multiple blocks.
 2019-12-03 16:41:26 +00:00
Marek Pikuła
9b390c5d4e Fix formatting of table in simple system 
Fixes #454
 2019-11-13 11:09:05 +00:00
Greg Chadwick
2041f10c69 Added simple system 
Simple system is a basic verilator top-level testbench for running
 executables.  It has functionality for outputting text to a log file
 and for the software to terminate the simulation
 2019-11-09 07:48:47 +00:00