ibex/dv/uvm/icache/doc at cvxif/2022/v0.2 - github-mirrors/ibex

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History

Tom Roberts 72a892d62c [rtl] Move PMP checking to IF stage output - Instruction addresses are now checked in the IF stage, after the cache and after the prefetch buffer. - To deal with unaligned instructions, the PMP logic checks the current address and the next in parallel. - The spec_branch timing hack has been removed as it's no longer relevant with the PMP logic moved. - Various updates made to the icache testbench to account for the changes. - Relates to #1471 Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>	2021-12-09 18:06:53 +00:00
..
ibex_icache_dv_plan.md	[rtl] Move PMP checking to IF stage output	2021-12-09 18:06:53 +00:00
tb.svg	Add ECC agents to ICache DV plan document	2020-06-16 09:28:57 +01:00

Tom Roberts 72a892d62c [rtl] Move PMP checking to IF stage output

- Instruction addresses are now checked in the IF stage, after the cache
  and after the prefetch buffer.
- To deal with unaligned instructions, the PMP logic checks the current
  address and the next in parallel.
- The spec_branch timing hack has been removed as it's no longer
  relevant with the PMP logic moved.
- Various updates made to the icache testbench to account for the
  changes.
- Relates to #1471

Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>

2021-12-09 18:06:53 +00:00

ibex_icache_dv_plan.md

[rtl] Move PMP checking to IF stage output

2021-12-09 18:06:53 +00:00

tb.svg

Add ECC agents to ICache DV plan document

2020-06-16 09:28:57 +01:00