Exact

Exact Union RegExp

Pascal Nasahl 35bbdb7be3 [rtl] Fix FI vulnerability in RF ... As described in #20715, a single fault-induced bit-flip inside the register file could change which of the register file value is provided to Ibex. This PR fixes this issue by (i) encoding raddr_a/b to one-hot encoded signals, (ii) checking these signals for faults, and (iii) using an one-hot encoded MUX to select which register file value is forwarded to rdata_a/b. Area increases by ~1% (Yosys + Nangate45 synthesis). I conducted a formal fault injection verification at the Yosys netlist to ensure that the issue really is fixed. Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org>		2024-01-04 15:26:32 +00:00
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ibex_cosim_agent	Drop an import from inside of a class	2023-05-26 10:58:20 +00:00
ibex_mem_intf_agent	Re-export imported symbols from ibex_mem_intf_pkg	2023-05-26 10:58:20 +00:00
irq_agent	[dv] Add missing isolation forks	2022-11-04 12:17:19 +00:00
prim	[rtl] Fix FI vulnerability in RF	2024-01-04 15:26:32 +00:00
date.c	Add wall-clock timeout within rtl simulation to gracefully end	2022-10-21 17:22:09 +01:00
date_dpi.svh	Add wall-clock timeout within rtl simulation to gracefully end	2022-10-21 17:22:09 +01:00