Currently, the dual-core lockstep FI mitigation is enabled/disabled using a single bit. For transient bit-flips, this is not problematic, as one bit-flip into this signal and one bit into the Ibex is required to threaten the security of the system. However, a permanent stuck-at-0 fault could disable the lockstep completely by targeting this signal. Then, only a single, additional fault (transient or permanent) is required. This PR enhances the FI resilience of the Ibex lockstep by encoding this single bit into a ibex_mubi_t signal, i.e., a 4-bit multi-bit signal. Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org> |
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.. | ||
common | ||
directed_tests | ||
env | ||
fcov | ||
riscv_dv_extension | ||
scripts | ||
tb | ||
tests | ||
waivers | ||
yaml | ||
.gitignore | ||
__init__.py | ||
cover.cfg | ||
ibex_dv.f | ||
ibex_dv_cosim_dpi.f | ||
Makefile | ||
README.md | ||
vcs.tcl | ||
wrapper.mk |
DV for the ibex core
For detailed documention on how Ibex's verification works, please have a look at the dedicated documentation page. This README provides a quick start guide to get things running.
Prerequisites
You need to have Xcelium available on your machine.
You can check whether you have it available by running: xrun --verison
You also need Spike to be able to compare to in the cosimulation.
We use a lowRISC specific Spike which you can find on its own GitHub page.
Some quick build instructions from within the riscv-isa-sim
repo:
mkdir build
cd build
../configure --enable-commitlog --enable-misaligned --prefix=$SPIKE_INSTALL_DIR
make
make install
export SPIKE_PATH=$SPIKE_INSTALL_DIR/bin
export PKG_CONFIG_PATH=$PKG_CONFIG_PATH:$SPIKE_INSTALL_DIR/lib/pkgconfig
You will need the RISC-V toolchain. You'll need to add this to your path and then also set the following environment variables:
export RISCV_GCC=riscv32-unknown-elf-gcc
export RISCV_OBJCOPY=riscv32-unknown-elf-objcopy
Running tests
To run tests you can make variations of the following command, where you replace $TEST_NAME
with the test (or a series of comma-separated tests) that you would like to run as specified in dv/uvm/core_ibex/riscv_dv_extension/testlist.yaml
:
make --keep-going IBEX_CONFIG=opentitan SIMULATOR=xlm ISS=spike ITERATIONS=1 SEED=1 TEST=$TEST_NAME WAVES=0 COV=0