ibex/shared/rtl
Pirmin Vogel db926e5ef5 [ram_2p] Set DataBitsPerMask parameter for prim_ram_2p
It turned out that with the default value of 1, Vivado infers a separate
18 Kbit BRAM instance for each bit of the 32-bit word for the FPGA
examples. This can be very wasteful in terms of resource utilization
especially for smaller configurations.

As our examples don't use ECC or parity and mainly target simualation
and FPGA, it's better to use a value of 8 for the DataBitsPerMask
parameter. Vivado will then not distribute words across different BRAM
instances which results in more efficient FPGA resource utilization.

For a detailed analysis and explanation, please refer to
lowRISC/Ibex#1587.

Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>
2022-04-01 16:32:45 +02:00
..
fpga/xilinx [fpga] Changed to 2p_ram for FPGA top level 2021-08-03 16:51:16 +01:00
sim Fix Verible lint issues 2020-07-03 12:20:32 +01:00
bus.sv [rtl] Avoid latch creation 2021-01-11 16:20:33 +01:00
ram_1p.sv Update lowrisc_ip to lowRISC/opentitan@1ae03937f 2021-03-12 16:15:22 +00:00
ram_2p.sv [ram_2p] Set DataBitsPerMask parameter for prim_ram_2p 2022-04-01 16:32:45 +02:00
timer.sv Fix Verible lint issues 2020-07-03 12:20:32 +01:00