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ibex/examples/fpga/artya7/rtl
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Rupert Swarbrick 2f1e188346 Fix port list in top_artya7 example 
The "alert_major" port was split into "internal" and "bus" parts back
in commit 9943f9a. Update the example to match.
2022-03-15 15:37:03 +00:00
..
top_artya7.sv Fix port list in top_artya7 example 2022-03-15 15:37:03 +00:00