Andreas Kurth a05d4d825c [rtl,pmp] Allow all accesses to Debug Module in debug mode ... The RISC-V Debug Specification (current release 1.0.0-rc4) in Section A.2 states that the PMP must not disallow accesses to addresses of the Debug Module when the hart is in debug mode, regardless of how the PMP is configured. This commit changes the PMP accordingly. Signed-off-by: Andreas Kurth <adk@lowrisc.org>		2024-12-19 10:42:48 +00:00
..
images	Block diagram: make feature text readable	2024-11-12 12:49:41 +00:00
cosim.rst	Bump Spike minimum version	2023-05-26 10:57:41 +00:00
coverage_plan.rst	Update more documentation links	2024-09-19 08:57:07 +00:00
cs_registers.rst	Update old cpuctrl CSR name in cs_registers.rst	2024-02-12 10:04:25 +00:00
debug.rst	[rtl,pmp] Allow all accesses to Debug Module in debug mode	2024-12-19 10:42:48 +00:00
exception_interrupts.rst	[doc] Fixes and clarifications for exceptions and interrupts	2022-11-29 19:21:08 +00:00
history.rst	Restructure documentation	2020-09-28 22:30:00 +01:00
icache.rst	[rtl] Add ic_scr_key_valid field to CPUCTRL (renamed CPUCTRLSTS)	2022-09-22 16:17:31 +01:00
index.rst	[doc] Add V2/V2S checklists and declare V2S	2022-11-18 20:37:13 +00:00
instruction_decode_execute.rst	[doc] fix a typo.	2024-08-28 10:17:28 +00:00
instruction_fetch.rst	[rtl] Add bus integrity checking	2021-08-26 16:55:26 +01:00
load_store_unit.rst	[rtl/dv] Bring back data integrity check on write responses	2022-10-14 18:22:58 +01:00
performance_counters.rst	Restructure documentation	2020-09-28 22:30:00 +01:00
pipeline_details.rst	[doc] Drop EXPERIMENTAL for verified features	2023-02-17 12:24:06 +00:00
pmp.rst	[rtl,pmp] Allow all accesses to Debug Module in debug mode	2024-12-19 10:42:48 +00:00
register_file.rst	Restructure documentation	2020-09-28 22:30:00 +01:00
rvfi.rst	Restructure documentation	2020-09-28 22:30:00 +01:00
security.rst	[rtl] Fix FI vulnerability in RF	2024-01-04 15:26:32 +00:00
testplan.rst	[doc] Add new Ibex testplan	2022-01-11 12:49:04 +00:00
tracer.rst	[rtl] Add a new top level plus wiring	2021-04-07 12:07:38 +01:00
verification.rst	Update more documentation links	2024-09-19 08:57:07 +00:00
verification_stages.rst	[ci] remove Azure Pipelines	2024-11-22 16:45:05 +00:00