mirror of
https://github.com/lowRISC/ibex.git
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21da9b3c7e
Update code from upstream repository https://github.com/lowRISC/opentitan to revision d268f271f4f75aeb8f3bf9624a497ae5bfb9c47e * [rtl] MuBi encoding of iCache memory ctrl signals (Pascal Nasahl) * [sram_ctrl] Add readback feature (Pascal Nasahl) * [fpv] Tweak report headers to match Jasper version (Rupert Swarbrick) * [prim_pad_wrapper,rtl] Change input enable to active-high (Andreas Kurth) * [hmac/rtl] Wait for digest of complete block when stopping (Martin Velay) * [prim_sha2_pad,rtl] Signal msg feed complete also when stopping (Andreas Kurth) * [prim_sha2_pad,rtl] Go to idle (without padding) when told to stop (Andreas Kurth) * [prim_sha2_pad,rtl] Refactor comparison on tx_count and msg len into signal (Andreas Kurth) * [prim_sha2_pad,rtl] Fix setting of digest mode when continuing (Andreas Kurth) * [hmac/prim_2,rtl] Do not clear redundant digest values (Ghada Dessouky) * [prim,fpv] Tweak how a parameter gets used in some assertions (Rupert Swarbrick) * [prim,fpv] Fix trivial lint warning in prim_fifo_sync_assert_fpv (Rupert Swarbrick) * [prim,rtl] Fix trivial lint warning in prim_fifo_sync (Rupert Swarbrick) * Launcher Modification (Youming Lu) * [top_earlgrey,pinmux] Add input disable attribute for non-manual pads (Andreas Kurth) * [dv] Add more prints to bit bash sequence (Rupert Swarbrick) * [ipgen,flash_ctrl] Fix core files (Guillermo Maturana) * [prim,rtl] Avoid unnecessary check in prim_esc_receiver.sv (Rupert Swarbrick) * [prim,fpv] Use PossibleActions param in prim_esc_receiver (Rupert Swarbrick) * [prim_diff_decode] Use `prim_xnor2` to detect integrity issue (Andreas Kurth) * [prim] Fix typo'd loop increment (James Wainwright) * [hmac/prim_sha2,rtl] Implement SW error for invalid HMAC config (Ghada Dessouky) * [rom] Remove real and fake key targets. (Miguel Osorio) * [prim_sha2,rtl/dv] Fix secret value wiping (Ghada Dessouky) * [prim,rtl,fpv] Fix typo in assertion in prim_alert_receiver (Rupert Swarbrick) * [fpv,prim] Drop prim_count_expected_failure.hjson (Rupert Swarbrick) * [fpv,prim] Generalise from DecrNeverTrue to listing possible actions (Rupert Swarbrick) * [prim,fpv] Correct assertions for commit_i input (Rupert Swarbrick) * [prim,fpv] Rephrase some "backwards" assertions in prim_count (Rupert Swarbrick) * [prim,fpv] Properly "waive" some unreachable prim_count assertions (Rupert Swarbrick) * [prim,fpv] Fix width of FPV variable in prim_arbiter_ppc.sv (Rupert Swarbrick) * [prim,fpv] Rephrase prim_count error assertions (Rupert Swarbrick) * [prim,fpv] Fix port list in prim_count_tb (Rupert Swarbrick) * [prim_ram_1p_scr] Align documentation with actual implementation (Pirmin Vogel) * [prim, rom_ctrl] Increase number of PRINCE rounds for improved security (Pirmin Vogel) * [prim,fpv] Make file structure slightly clearer (Rupert Swarbrick) * [prim,fpv] Shorten a variable name (prim_hier -> hier) (Rupert Swarbrick) * [prim,fpv] Tidy up and document some FPV macros (Rupert Swarbrick) * [dvsim,lint] Fix bug in duplicate detection in lint parser (Rupert Swarbrick) * [rtl,comments] Fix some comments (Guillermo Maturana) * [dv,prim] Clarification of reset behavior (Adrian Lees) * [ast] Add dependency in fileset_partner to select correct ast_pkg (Sharon Topaz) * [prim,fpv] Only allow unconstrained counters in prim_count FPV (Rupert Swarbrick) * [dvsim] Split and rename Modes.py (Rupert Swarbrick) * [prim,dv] Tweak ASSERT_FINAL to be a no-op if FPV enabled (Rupert Swarbrick) * [prim,tlul,rtl] Explicitly cast a "1" to specific number of bits (Rupert Swarbrick) * [dvsim] Fix plurals in type names in Modes.py (Rupert Swarbrick) * [dvsim] Move find_mode and find_and_merge_modes out of Modes class (Rupert Swarbrick) * [dvsim] Die more cleanly on an invalid use of merge_mode (Rupert Swarbrick) * [dvsim] Get rid of "mname" field in Modes.py (Rupert Swarbrick) * [dvsim] Simplify named attribute lookup in Modes.py (Rupert Swarbrick) * [dvsim] Get rid of pretty print magic in Modes.py (Rupert Swarbrick) * [dvsim] Strengthen typing and simplify printing for modes in SimCfg (Rupert Swarbrick) * [dvsim] Slightly tidy up SimCfg._print_list (Rupert Swarbrick) * [dvsim] Get rid of an unused dictionary in OneShotCfg.py (Rupert Swarbrick) * Add the project name to the copyright header (Michael Munday) * Fix or waive Python lint errors and warnings (Pirmin Vogel) * Remove trailing whitespaces (Pirmin Vogel) * [dv,mem_bkdr] Fix handling of multiple tiles in sram (Guillermo Maturana) * [hmac] Coding style and minor fixes (Ghada Dessouky) * [dv] Remove phase argument from monitor's collect_trans (Rupert Swarbrick) * [prim_fifo_sync_cnt] Minor code cleanup (Andreas Kurth) * [dv,mem_bkdr] Fix digest calculation for hw_cfg0 (Guillermo Maturana) * [prim_fifo_sync_cnt] Fix signedness of Depth parameter (Andreas Kurth) * [prim_fifo_sync] Keep wraparound pointers contained within `prim_fifo_sync_cnt` (Andreas Kurth) * [prim_fifo_sync] Move pointer and depth calculation to `prim_fifo_sync_cnt` (Andreas Kurth) * [prim_fifo_sync] Remove out-commented RTL code (Andreas Kurth) * [prim_fifo_sync_cnt] Improve module and parameter documentation (Andreas Kurth) * [lint] Demote licence warning in AscentLint parser (Rupert Swarbrick) * Revert "[dv] Remove phase argument from monitor's collect_trans" (Rupert Swarbrick) * [dv] Fix parameter types in dv_base_mubi_cov.sv (Rupert Swarbrick) * [dv] Remove phase argument from monitor's collect_trans (Rupert Swarbrick) * [dv, xcelium] Use detachable reports to avoid CORS (Elliot Baptist) * [otp_ctrl] Add fuse for late debug enable mechanism (Michael Schaffner) * [prim] Add support for MuBi's up to 32bit (Michael Schaffner) * [otp_ctrl] Increase Hamming distance in OTP commands (Michael Schaffner) * [dv] Add checks to set_freq_*hz (Rupert Swarbrick) * [dv] Fix more timeout comments with wrong units (Elliot Baptist) * Make .core files pass FuseSoC 2 schema validator (Olof Kindgren) * [dvsim] Run deepcopy to work around memory usage bug (Rupert Swarbrick) * [dvsim] Make global_val handling a bit clearer (Rupert Swarbrick) * [prim_sha2,rtl] Add key_length type and change type encodings (Ghada Dessouky) * [dv,sram_ctrl] Fix a few failing tests (Guillermo Maturana) * [topgen] Add field to specify status IRQ default behavior (Michael Schaffner) * [dv] Update clear_all_interrupts to support status type (Michael Schaffner) Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org> |
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| .. | ||
| eembc_coremark | ||
| google_riscv-dv | ||
| lowrisc_ip | ||
| patches | ||
| riscv-arch-tests | ||
| riscv-isa-sim | ||
| riscv-test-env | ||
| riscv-tests | ||
| eembc_coremark.lock.hjson | ||
| google_riscv-dv.lock.hjson | ||
| google_riscv-dv.vendor.hjson | ||
| lowrisc_ip.lock.hjson | ||
| lowrisc_ip.vendor.hjson | ||
| riscv_arch_tests.lock.hjson | ||
| riscv_arch_tests.vendor.hjson | ||
| riscv_isa_sim.lock.hjson | ||
| riscv_isa_sim.vendor.hjson | ||
| riscv_test_env.lock.hjson | ||
| riscv_test_env.vendor.hjson | ||
| riscv_tests.lock.hjson | ||
| riscv_tests.vendor.hjson | ||