c0636dcbde
Here's a high-level overview of what this commit does: - Compiles Sail into SystemVerilog including patchin compiler bugs - Create a TCL file that tells JasperGold what to prove and assume - Check memory operations modelling the LSU Most of these properties now prove without time-bound on the response from memory due to alternative LSUs - Check memory even with Smepmp errors: Continues on top of https://github.com/riscv/sail-riscv/pull/196 - CSR verification - Checks for instruction types such as B-Type, I-Type, R-Type - Check illegal instructions and WFI instructions - Using psgen language for proof generation - Documentation on how to use the setup - Wrap around proof that proves instructions executed in a row still match the specification. - Liveness proof to guarantee instructions will retire within a upper bound of cycles. All of these proofs make heavy use of the concept of k-induction. All the different properties and steps are necessary to help the tool get the useful properties it needs to prove the next step. The instruction correctness, wrap-around and liveness all give us increased confidence that Ibex is trace-equivalent to Sail. Throughout this process an issue was found in Ibex where the pipeline was not flushing properly on changing PMP registers using clear: #2193 Alternative LSUs: This makes all top level memory properties prove quickly and at a low proof effort (1 or 2-induction). Three 'alternative LSUs' representing three stages of memory instructions: 1. Before the first response is received, in the EX stage 2. After the first response is received, but not the second grant, also in the EX stage 3. Before the last response is received in the WB stage. In each case we ask 'if the response came now, would the result be correct?'. Similar is applied for CSRs/PC though less directly. This is particularly interesting (read: ugly) in the case of a PMP error wbexc_exists makes Wrap properties fast to prove. The bottleneck becomes SpecPastNoWbexcPC, which fails only due to a bug. See the comment in riscv.proof. Co-authored-by: Marno van der Maas <mvdmaas+git@lowrisc.org> Signed-off-by: Louis-Emile Ploix <louis-emile.ploix@lowrisc.org>
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Credits
Ibex has originally been developed by the PULP team at ETH Zürich and University of Bologna under the name Zero-riscy. In December 2018, Ibex has been contributed to lowRISC who is maintaining and advancing the design since then.
Similarly, the Ibex dv/formal work was originally developed by the University of
Oxford in the summer of 2023. In the summer of 2024 this work was extended
for and contributed to lowRISC who is now maintaining and advancing the design.
Throughout the years, Ibex has seen contributions from many people and we at lowRISC are very thankful for all of them. This file lists the many people who contributed to what is called Ibex today. If you made a contribution to Ibex in the form of source code, bug reports, testing, marketing, or any other form, please feel free to open a pull request to get your name added to this file.
- Alex Bradbury
- Andreas Kurth
- Andreas Traber
- Antonio Pullini
- Bryan Cantrill
- Canberk Topal
- Cathal Minnock
- Daniel Mlynek
- Dawid Zimonczyk
- Eunchan Kim
- Felix Yan
- Flavian Solt
- Florian Zaruba
- Francesco Conti
- Gary Guo
- Germain Haugou
- Greg Chadwick
- Harry Callahan
- Hai Hoang Dang
- Henner Zeller
- Hodjat Asghari Esfeden
- Igor Loi
- Ioannis Karageorgos
- Ivan Ribeiro
- Karol Gugala
- Leon Woestenberg
- Louis-Emile Ploix
- Luís Marques
- Marek Pikuła
- Markus Wegmann
- Marno van der Maas
- Matthias Baer
- Mehmet Burak Aykenar
- Michael Gautschi
- Michael Gielda
- Michael Munday
- Michael Platzer
- Michael Schaffner
- Nils Graf
- Noah Huesser
- Noam Gallmann
- Pasquale Davide Schiavone
- Paul O'Keeffe
- Philipp Wagner
- Pirmin Vogel
- Prajwala Puttappa
- Rahul Behl
- Rhys Thomas
- Renzo Andri
- Robert Schilling
- Rupert Swarbick
- Sam Elliott
- Scott Johnson
- Stefan Mach
- Stefan Tauner
- Stefan Wallentowitz
- Sven Stucki
- Tao Liu
- Tobias Wölfel
- Tom Roberts
- Tudor Timi
- Udi Jonnalagadda
- Vladimir Rozic
- Yuichi Sugiyama
- Yusef Karim
- Zachary Snow
- Zeeshan Rafique