ibex/examples/fpga/artya7/util
Canberk Topal 9af580f6d9 [fpga] Add power analysis scripts to FPGA example
This commit adds power analysis scripts to the Arty A7
example design. They can be used by setting the newly
added `FPGAPowerAnalysis` parameter to 1.

Signed-off-by: Canberk Topal <ctopal@lowrisc.org>
2021-08-03 16:51:16 +01:00
..
vivado_hook_write_bitstream_pre.tcl [fpga] Add power analysis scripts to FPGA example 2021-08-03 16:51:16 +01:00
vivado_setup_hooks.tcl [fpga] Add power analysis scripts to FPGA example 2021-08-03 16:51:16 +01:00