Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
Find a file
Philipp Wagner e9e5a719bc Move RTL code into rtl/ directory
This gives us a bit of space in the source tree for documentation,
verification, utilities, and much more.
2019-04-26 15:05:17 +01:00
ci added trigger for pulpino 2017-06-12 14:15:08 +02:00
doc Doc: Bump sphinx version 2018-11-23 20:34:47 +01:00
rtl Move RTL code into rtl/ directory 2019-04-26 15:05:17 +01:00
.gitignore Fix some issues and cleanup 2016-12-30 00:26:15 +01:00
.gitlab-ci.yml added trigger for pulpino 2017-06-12 14:15:08 +02:00
LICENSE Removed non-ASCII characters 2018-01-29 22:05:44 +01:00
README.md Rename zeroriscy to ibex 2019-04-26 15:05:01 +01:00
src_files.yml Rename zeroriscy to ibex 2019-04-26 15:05:01 +01:00

ibex: RISC-V Core

ibex is a small 2-stage RISC-V core derived from RI5CY.

ibex fully implements the RV32IMC instruction set and a minimal set of RISCV privileged specifications. ibex can be configured to be very small by disabling the RV32M extensions and by activating the RV32E extensions. This configuration is called micro-riscy

The core was developed as part of the PULP platform for energy-efficient computing and is currently used as the control core for PULP and PULPino.

Documentation

A datasheet that explains the most important features of the core can be found in the doc folder.