Exact

Exact Union RegExp

Tobias Wölfel 0f2dc5c64a [rtl] Avoid latch creation ... Following Verilator warning set default value to avoid the creation of a latch.		2021-01-11 16:20:33 +01:00
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fpga/xilinx	Use vendored-in primitives from OpenTitan	2020-05-27 10:23:15 +01:00
sim	Fix Verible lint issues	2020-07-03 12:20:32 +01:00
bus.sv	[rtl] Avoid latch creation	2021-01-11 16:20:33 +01:00
ram_1p.sv	Pass MemInitFile parameter from our ram_*p wrappers	2020-07-03 15:42:39 +01:00
ram_2p.sv	Pass MemInitFile parameter from our ram_*p wrappers	2020-07-03 15:42:39 +01:00
timer.sv	Fix Verible lint issues	2020-07-03 12:20:32 +01:00