mirror of
https://github.com/stnolting/neorv32.git
synced 2025-04-24 06:07:52 -04:00
[top] add inter-core com wiring
This commit is contained in:
stnolting
parent
271ff4a734
commit
1002ab6230
1 changed files with 114 additions and 77 deletions
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@ -310,6 +310,14 @@ architecture neorv32_top_rtl of neorv32_top is
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signal dci_ndmrstn : std_ulogic;
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signal dci_haltreq : std_ulogic_vector(num_cores_c-1 downto 0);
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-- CPU ICC links --
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type icc_rdy_t is array (0 to num_cores_c-1) of std_ulogic_vector(num_cores_c-1 downto 0);
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type icc_ack_t is array (0 to num_cores_c-1) of std_ulogic_vector(num_cores_c-1 downto 0);
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type icc_dat_t is array (0 to num_cores_c-1) of std_ulogic_vector(num_cores_c*32-1 downto 0);
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signal icc_tx_rdy, icc_rx_rdy : icc_rdy_t;
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signal icc_tx_ack, icc_rx_ack : icc_ack_t;
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signal icc_tx_dat, icc_rx_dat : icc_dat_t;
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-- bus: CPU core(s) + L1 caches --
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type multicore_req_t is array (0 to num_cores_c-1) of bus_req_t;
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type multicore_rsp_t is array (0 to num_cores_c-1) of bus_rsp_t;
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@ -499,6 +507,7 @@ begin
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generic map (
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-- General --
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HART_ID => i,
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NUM_HARTS => num_cores_c,
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VENDOR_ID => vendorid_c,
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BOOT_ADDR => cpu_boot_addr_c,
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DEBUG_PARK_ADDR => dm_park_entry_c,
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@ -545,26 +554,54 @@ begin
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)
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port map (
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-- global control --
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clk_i => clk_i,
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rstn_i => rstn_sys,
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clk_i => clk_i,
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rstn_i => rstn_sys,
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-- interrupts --
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msi_i => msw_irq(i),
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mei_i => mext_irq_i,
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mti_i => mtime_irq(i),
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firq_i => cpu_firq,
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dbi_i => dci_haltreq(i),
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msi_i => msw_irq(i),
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mei_i => mext_irq_i,
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mti_i => mtime_irq(i),
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firq_i => cpu_firq,
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dbi_i => dci_haltreq(i),
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-- instruction bus interface --
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ibus_req_o => cpu_i_req(i),
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ibus_rsp_i => cpu_i_rsp(i),
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ibus_req_o => cpu_i_req(i),
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ibus_rsp_i => cpu_i_rsp(i),
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-- data bus interface --
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dbus_req_o => cpu_d_req(i),
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dbus_rsp_i => cpu_d_rsp(i)
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dbus_req_o => cpu_d_req(i),
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dbus_rsp_i => cpu_d_rsp(i),
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-- ICC TX links --
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icc_tx_rdy_o => icc_tx_rdy(i),
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icc_tx_ack_i => icc_tx_ack(i),
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icc_tx_dat_o => icc_tx_dat(i),
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-- ICC RX links --
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icc_rx_rdy_i => icc_rx_rdy(i),
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icc_rx_ack_o => icc_rx_ack(i),
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icc_rx_dat_i => icc_rx_dat(i)
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);
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-- inter-core communication (ICC) links (connect every core with every other) --
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icc_gen:
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for j in 0 to num_cores_c-1 generate
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icc_gen_terminate: -- do not connect a core's link to itself
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if i = j generate
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icc_rx_rdy(i)(j) <= '0';
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icc_tx_ack(i)(j) <= '0';
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icc_rx_dat(i)(j*32+31 downto j*32) <= (others => '0');
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end generate;
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ip_gen_connect:
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if i /= j generate
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icc_rx_rdy(i)(j) <= icc_tx_rdy(j)(i);
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icc_tx_ack(i)(j) <= icc_rx_ack(j)(i);
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icc_rx_dat(i)(j*32+31 downto j*32) <= icc_tx_dat(j)(i*32+31 downto i*32);
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end generate;
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end generate;
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-- CPU L1 Instruction Cache (I-Cache) -----------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_icache_inst_true:
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neorv32_icache_enabled:
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if ICACHE_EN generate
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neorv32_icache_inst: entity neorv32.neorv32_cache
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generic map (
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@ -584,7 +621,7 @@ begin
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);
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end generate;
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neorv32_icache_inst_false:
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neorv32_icache_disabled:
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if not ICACHE_EN generate
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icache_req(i) <= cpu_i_req(i);
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cpu_i_rsp(i) <= icache_rsp(i);
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@ -593,7 +630,7 @@ begin
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-- CPU L1 Data Cache (D-Cache) ------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_dcache_inst_true:
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neorv32_dcache_enabled:
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if DCACHE_EN generate
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neorv32_dcache_inst: entity neorv32.neorv32_cache
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generic map (
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@ -613,7 +650,7 @@ begin
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);
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end generate;
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neorv32_dcache_inst_false:
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neorv32_dcache_disabled:
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if not DCACHE_EN generate
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dcache_req(i) <= cpu_d_req(i);
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cpu_d_rsp(i) <= dcache_rsp(i);
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@ -677,7 +714,7 @@ begin
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-- Direct Memory Access Controller (DMA) Complex
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-- **************************************************************************************************************************
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neorv32_dma_complex_true:
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neorv32_dma_complex_enabled:
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if IO_DMA_EN generate
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-- DMA Controller -------------------------------------------------------------------------
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@ -715,9 +752,9 @@ begin
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x_rsp_i => main_rsp
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);
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end generate; -- /neorv32_dma_complex_true
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end generate; -- /neorv32_dma_complex_enabled
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neorv32_dma_complex_false:
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neorv32_dma_complex_disabled:
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if not IO_DMA_EN generate
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iodev_rsp(IODEV_DMA) <= rsp_terminate_c;
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main_req <= complex_req;
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@ -730,7 +767,7 @@ begin
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-- Read-Modify-Write Controller for Atomic Memory Operations
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-- **************************************************************************************************************************
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neorv32_bus_amo_ctrl_true:
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neorv32_bus_amo_ctrl_enabled:
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if RISCV_ISA_Zaamo generate
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neorv32_bus_amo_ctrl_inst: entity neorv32.neorv32_bus_amo_ctrl
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port map (
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@ -743,7 +780,7 @@ begin
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);
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end generate;
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neorv32_bus_amo_ctrl_false:
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neorv32_bus_amo_ctrl_disabled:
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if not RISCV_ISA_Zaamo generate
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main2_req <= main_req;
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main_rsp <= main2_rsp;
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@ -811,7 +848,7 @@ begin
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-- Processor-Internal Instruction Memory (IMEM) -------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_int_imem_inst_true:
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neorv32_int_imem_enabled:
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if MEM_INT_IMEM_EN generate
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neorv32_int_imem_inst: entity neorv32.neorv32_imem
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generic map (
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@ -826,7 +863,7 @@ begin
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);
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end generate;
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neorv32_int_imem_inst_false:
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neorv32_int_imem_disabled:
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if not MEM_INT_IMEM_EN generate
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imem_rsp <= rsp_terminate_c;
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end generate;
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@ -834,7 +871,7 @@ begin
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-- Processor-Internal Data Memory (DMEM) --------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_int_dmem_inst_true:
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neorv32_int_dmem_enabled:
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if MEM_INT_DMEM_EN generate
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neorv32_int_dmem_inst: entity neorv32.neorv32_dmem
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generic map (
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@ -848,7 +885,7 @@ begin
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);
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end generate;
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neorv32_int_dmem_inst_false:
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neorv32_int_dmem_disabled:
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if not MEM_INT_DMEM_EN generate
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dmem_rsp <= rsp_terminate_c;
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end generate;
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@ -856,7 +893,7 @@ begin
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-- Execute In-Place Module (XIP) ----------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_xip_inst_true:
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neorv32_xip_enabled:
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if XIP_EN generate
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-- XIP interface --
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@ -880,7 +917,7 @@ begin
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);
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-- XIP cache (XIP-CACHE) --
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neorv32_xipcache_inst_true:
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neorv32_xipcache_enabled:
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if XIP_CACHE_EN generate
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neorv32_xcache_inst: entity neorv32.neorv32_cache
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generic map (
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@ -900,15 +937,15 @@ begin
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);
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end generate;
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neorv32_xipcache_inst_false:
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neorv32_xipcache_disabled:
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if not XIP_CACHE_EN generate
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xipcache_req <= xip_req;
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xip_rsp <= xipcache_rsp;
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end generate;
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end generate; -- /neorv32_xip_inst_true
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end generate; -- /neorv32_xip_enabled
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neorv32_xip_inst_false:
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neorv32_xip_disabled:
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if not XIP_EN generate
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iodev_rsp(IODEV_XIP) <= rsp_terminate_c;
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xip_rsp <= rsp_terminate_c;
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@ -921,7 +958,7 @@ begin
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-- External Bus Interface (XBUS) ----------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_xbus_inst_true:
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neorv32_xbus_enabled:
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if XBUS_EN generate
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-- external bus gateway (XBUS) --
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@ -949,7 +986,7 @@ begin
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);
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-- external bus cache (X-CACHE) --
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neorv32_xcache_inst_true:
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neorv32_xcache_enabled:
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if XBUS_CACHE_EN generate
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neorv32_xcache_inst: entity neorv32.neorv32_cache
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generic map (
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@ -969,15 +1006,15 @@ begin
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);
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end generate;
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neorv32_xcache_inst_false:
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neorv32_xcache_disabled:
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if not XBUS_CACHE_EN generate
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xcache_req <= xbus_req;
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xbus_rsp <= xcache_rsp;
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end generate;
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end generate; -- /neorv32_xbus_inst_true
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end generate; -- /neorv32_xbus_enabled
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neorv32_xbus_inst_false:
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neorv32_xbus_disabled:
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if not XBUS_EN generate
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xbus_rsp <= rsp_terminate_c;
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xbus_adr_o <= (others => '0');
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@ -1081,7 +1118,7 @@ begin
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-- Processor-Internal Bootloader ROM (BOOTROM) --------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_boot_rom_inst_true:
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neorv32_boot_rom_enabled:
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if bootrom_en_c generate
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neorv32_boot_rom_inst: entity neorv32.neorv32_boot_rom
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port map (
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@ -1092,7 +1129,7 @@ begin
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);
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end generate;
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neorv32_boot_rom_inst_false:
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neorv32_boot_rom_disabled:
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if not bootrom_en_c generate
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iodev_rsp(IODEV_BOOTROM) <= rsp_terminate_c;
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end generate;
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@ -1100,7 +1137,7 @@ begin
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-- Custom Functions Subsystem (CFS) -------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_cfs_inst_true:
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neorv32_cfs_enabled:
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if IO_CFS_EN generate
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neorv32_cfs_inst: entity neorv32.neorv32_cfs
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generic map (
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@ -1121,7 +1158,7 @@ begin
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);
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end generate;
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neorv32_cfs_inst_false:
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neorv32_cfs_disabled:
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if not IO_CFS_EN generate
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iodev_rsp(IODEV_CFS) <= rsp_terminate_c;
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clk_gen_en(CG_CFS) <= '0';
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@ -1132,7 +1169,7 @@ begin
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-- Serial Data Interface (SDI) ------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_sdi_inst_true:
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neorv32_sdi_enabled:
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if IO_SDI_EN generate
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neorv32_sdi_inst: entity neorv32.neorv32_sdi
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generic map (
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@ -1151,7 +1188,7 @@ begin
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);
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end generate;
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neorv32_sdi_inst_false:
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neorv32_sdi_disabled:
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if not IO_SDI_EN generate
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iodev_rsp(IODEV_SDI) <= rsp_terminate_c;
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sdi_dat_o <= '0';
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@ -1161,7 +1198,7 @@ begin
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-- General Purpose Input/Output Port (GPIO) -----------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_gpio_inst_true:
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neorv32_gpio_enabled:
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if io_gpio_en_c generate
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neorv32_gpio_inst: entity neorv32.neorv32_gpio
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generic map (
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@ -1177,7 +1214,7 @@ begin
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);
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end generate;
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neorv32_gpio_inst_false:
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neorv32_gpio_disabled:
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if not io_gpio_en_c generate
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iodev_rsp(IODEV_GPIO) <= rsp_terminate_c;
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gpio_o <= (others => '0');
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@ -1186,7 +1223,7 @@ begin
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-- Watch Dog Timer (WDT) ------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_wdt_inst_true:
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neorv32_wdt_enabled:
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if IO_WDT_EN generate
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neorv32_wdt_inst: entity neorv32.neorv32_wdt
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port map (
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@ -1202,7 +1239,7 @@ begin
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);
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end generate;
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neorv32_wdt_inst_false:
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neorv32_wdt_disabled:
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if not IO_WDT_EN generate
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iodev_rsp(IODEV_WDT) <= rsp_terminate_c;
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clk_gen_en(CG_WDT) <= '0';
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@ -1212,7 +1249,7 @@ begin
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-- Core Local Interruptor (CLINT) ---------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_clint_inst_true:
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neorv32_clint_enabled:
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if IO_CLINT_EN generate
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neorv32_clint_inst: entity neorv32.neorv32_clint
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generic map (
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@ -1229,7 +1266,7 @@ begin
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);
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end generate;
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neorv32_clint_inst_false:
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neorv32_clint_disabled:
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if not IO_CLINT_EN generate
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iodev_rsp(IODEV_CLINT) <= rsp_terminate_c;
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mtime_time_o <= (others => '0');
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@ -1240,7 +1277,7 @@ begin
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-- Primary Universal Asynchronous Receiver/Transmitter (UART0) ----------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_uart0_inst_true:
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neorv32_uart0_enabled:
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if IO_UART0_EN generate
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neorv32_uart0_inst: entity neorv32.neorv32_uart
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generic map (
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@ -1265,7 +1302,7 @@ begin
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);
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end generate;
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neorv32_uart0_inst_false:
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neorv32_uart0_disabled:
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if not IO_UART0_EN generate
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iodev_rsp(IODEV_UART0) <= rsp_terminate_c;
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uart0_txd_o <= '0';
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@ -1278,7 +1315,7 @@ begin
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-- Secondary Universal Asynchronous Receiver/Transmitter (UART1) --------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_uart1_inst_true:
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neorv32_uart1_enabled:
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if IO_UART1_EN generate
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neorv32_uart1_inst: entity neorv32.neorv32_uart
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generic map (
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@ -1303,7 +1340,7 @@ begin
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);
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end generate;
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neorv32_uart1_inst_false:
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neorv32_uart1_disabled:
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if not IO_UART1_EN generate
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iodev_rsp(IODEV_UART1) <= rsp_terminate_c;
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uart1_txd_o <= '0';
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@ -1316,7 +1353,7 @@ begin
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-- Serial Peripheral Interface (SPI) ------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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neorv32_spi_inst_true:
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neorv32_spi_enabled:
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if IO_SPI_EN generate
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neorv32_spi_inst: entity neorv32.neorv32_spi
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generic map (
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@ -1337,7 +1374,7 @@ begin
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);
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end generate;
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neorv32_spi_inst_false:
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neorv32_spi_disabled:
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if not IO_SPI_EN generate
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iodev_rsp(IODEV_SPI) <= rsp_terminate_c;
|
||||
spi_clk_o <= '0';
|
||||
|
|
@ -1350,7 +1387,7 @@ begin
|
|||
|
||||
-- Two-Wire Interface (TWI) ---------------------------------------------------------------
|
||||
-- -------------------------------------------------------------------------------------------
|
||||
neorv32_twi_inst_true:
|
||||
neorv32_twi_enabled:
|
||||
if IO_TWI_EN generate
|
||||
neorv32_twi_inst: entity neorv32.neorv32_twi
|
||||
generic map (
|
||||
|
|
@ -1371,7 +1408,7 @@ begin
|
|||
);
|
||||
end generate;
|
||||
|
||||
neorv32_twi_inst_false:
|
||||
neorv32_twi_disabled:
|
||||
if not IO_TWI_EN generate
|
||||
iodev_rsp(IODEV_TWI) <= rsp_terminate_c;
|
||||
twi_sda_o <= '1';
|
||||
|
|
@ -1383,7 +1420,7 @@ begin
|
|||
|
||||
-- Two-Wire Device (TWD) ------------------------------------------------------------------
|
||||
-- -------------------------------------------------------------------------------------------
|
||||
neorv32_twd_inst_true:
|
||||
neorv32_twd_enabled:
|
||||
if IO_TWD_EN generate
|
||||
neorv32_twd_inst: entity neorv32.neorv32_twd
|
||||
generic map (
|
||||
|
|
@ -1404,7 +1441,7 @@ begin
|
|||
);
|
||||
end generate;
|
||||
|
||||
neorv32_twd_inst_false:
|
||||
neorv32_twd_disabled:
|
||||
if not IO_TWD_EN generate
|
||||
iodev_rsp(IODEV_TWD) <= rsp_terminate_c;
|
||||
twd_sda_o <= '1';
|
||||
|
|
@ -1416,7 +1453,7 @@ begin
|
|||
|
||||
-- Pulse-Width Modulation Controller (PWM) ------------------------------------------------
|
||||
-- -------------------------------------------------------------------------------------------
|
||||
neorv32_pwm_inst_true:
|
||||
neorv32_pwm_enabled:
|
||||
if io_pwm_en_c generate
|
||||
neorv32_pwm_inst: entity neorv32.neorv32_pwm
|
||||
generic map (
|
||||
|
|
@ -1433,7 +1470,7 @@ begin
|
|||
);
|
||||
end generate;
|
||||
|
||||
neorv32_pwm_inst_false:
|
||||
neorv32_pwm_disabled:
|
||||
if not io_pwm_en_c generate
|
||||
iodev_rsp(IODEV_PWM) <= rsp_terminate_c;
|
||||
clk_gen_en(CG_PWM) <= '0';
|
||||
|
|
@ -1443,7 +1480,7 @@ begin
|
|||
|
||||
-- True Random Number Generator (TRNG) ----------------------------------------------------
|
||||
-- -------------------------------------------------------------------------------------------
|
||||
neorv32_trng_inst_true:
|
||||
neorv32_trng_enabled:
|
||||
if IO_TRNG_EN generate
|
||||
neorv32_trng_inst: entity neorv32.neorv32_trng
|
||||
generic map (
|
||||
|
|
@ -1457,7 +1494,7 @@ begin
|
|||
);
|
||||
end generate;
|
||||
|
||||
neorv32_trng_inst_false:
|
||||
neorv32_trng_disabled:
|
||||
if not IO_TRNG_EN generate
|
||||
iodev_rsp(IODEV_TRNG) <= rsp_terminate_c;
|
||||
end generate;
|
||||
|
|
@ -1465,7 +1502,7 @@ begin
|
|||
|
||||
-- Smart LED (WS2811/WS2812) Interface (NEOLED) -------------------------------------------
|
||||
-- -------------------------------------------------------------------------------------------
|
||||
neorv32_neoled_inst_true:
|
||||
neorv32_neoled_enabled:
|
||||
if IO_NEOLED_EN generate
|
||||
neorv32_neoled_inst: entity neorv32.neorv32_neoled
|
||||
generic map (
|
||||
|
|
@ -1483,7 +1520,7 @@ begin
|
|||
);
|
||||
end generate;
|
||||
|
||||
neorv32_neoled_inst_false:
|
||||
neorv32_neoled_disabled:
|
||||
if not IO_NEOLED_EN generate
|
||||
iodev_rsp(IODEV_NEOLED) <= rsp_terminate_c;
|
||||
clk_gen_en(CG_NEOLED) <= '0';
|
||||
|
|
@ -1494,7 +1531,7 @@ begin
|
|||
|
||||
-- External Interrupt Controller (XIRQ) ---------------------------------------------------
|
||||
-- -------------------------------------------------------------------------------------------
|
||||
neorv32_xirq_inst_true:
|
||||
neorv32_xirq_enabled:
|
||||
if io_xirq_en_c generate
|
||||
neorv32_xirq_inst: entity neorv32.neorv32_xirq
|
||||
generic map (
|
||||
|
|
@ -1510,7 +1547,7 @@ begin
|
|||
);
|
||||
end generate;
|
||||
|
||||
neorv32_xirq_inst_false:
|
||||
neorv32_xirq_disabled:
|
||||
if not io_xirq_en_c generate
|
||||
iodev_rsp(IODEV_XIRQ) <= rsp_terminate_c;
|
||||
firq(FIRQ_XIRQ) <= '0';
|
||||
|
|
@ -1519,7 +1556,7 @@ begin
|
|||
|
||||
-- General Purpose Timer (GPTMR) ----------------------------------------------------------
|
||||
-- -------------------------------------------------------------------------------------------
|
||||
neorv32_gptmr_inst_true:
|
||||
neorv32_gptmr_enabled:
|
||||
if IO_GPTMR_EN generate
|
||||
neorv32_gptmr_inst: entity neorv32.neorv32_gptmr
|
||||
port map (
|
||||
|
|
@ -1533,7 +1570,7 @@ begin
|
|||
);
|
||||
end generate;
|
||||
|
||||
neorv32_gptmr_inst_false:
|
||||
neorv32_gptmr_disabled:
|
||||
if not IO_GPTMR_EN generate
|
||||
iodev_rsp(IODEV_GPTMR) <= rsp_terminate_c;
|
||||
clk_gen_en(CG_GPTMR) <= '0';
|
||||
|
|
@ -1543,7 +1580,7 @@ begin
|
|||
|
||||
-- 1-Wire Interface Controller (ONEWIRE) --------------------------------------------------
|
||||
-- -------------------------------------------------------------------------------------------
|
||||
neorv32_onewire_inst_true:
|
||||
neorv32_onewire_enabled:
|
||||
if IO_ONEWIRE_EN generate
|
||||
neorv32_onewire_inst: entity neorv32.neorv32_onewire
|
||||
generic map (
|
||||
|
|
@ -1562,7 +1599,7 @@ begin
|
|||
);
|
||||
end generate;
|
||||
|
||||
neorv32_onewire_inst_false:
|
||||
neorv32_onewire_disabled:
|
||||
if not IO_ONEWIRE_EN generate
|
||||
iodev_rsp(IODEV_ONEWIRE) <= rsp_terminate_c;
|
||||
onewire_o <= '1';
|
||||
|
|
@ -1573,7 +1610,7 @@ begin
|
|||
|
||||
-- Stream Link Interface (SLINK) ----------------------------------------------------------
|
||||
-- -------------------------------------------------------------------------------------------
|
||||
neorv32_slink_inst_true:
|
||||
neorv32_slink_enabled:
|
||||
if IO_SLINK_EN generate
|
||||
neorv32_slink_inst: entity neorv32.neorv32_slink
|
||||
generic map (
|
||||
|
|
@ -1600,7 +1637,7 @@ begin
|
|||
);
|
||||
end generate;
|
||||
|
||||
neorv32_slink_inst_false:
|
||||
neorv32_slink_disabled:
|
||||
if not IO_SLINK_EN generate
|
||||
iodev_rsp(IODEV_SLINK) <= rsp_terminate_c;
|
||||
firq(FIRQ_SLINK_RX) <= '0';
|
||||
|
|
@ -1615,7 +1652,7 @@ begin
|
|||
|
||||
-- Cyclic Redundancy Check Unit (CRC) -----------------------------------------------------
|
||||
-- -------------------------------------------------------------------------------------------
|
||||
neorv32_crc_inst_true:
|
||||
neorv32_crc_enabled:
|
||||
if IO_CRC_EN generate
|
||||
neorv32_crc_inst: entity neorv32.neorv32_crc
|
||||
port map (
|
||||
|
|
@ -1626,7 +1663,7 @@ begin
|
|||
);
|
||||
end generate;
|
||||
|
||||
neorv32_crc_inst_false:
|
||||
neorv32_crc_disabled:
|
||||
if not IO_CRC_EN generate
|
||||
iodev_rsp(IODEV_CRC) <= rsp_terminate_c;
|
||||
end generate;
|
||||
|
|
@ -1634,7 +1671,7 @@ begin
|
|||
|
||||
-- System Configuration Information Memory (SYSINFO) --------------------------------------
|
||||
-- -------------------------------------------------------------------------------------------
|
||||
neorv32_sysinfo_inst_true:
|
||||
neorv32_sysinfo_enabled:
|
||||
if io_sysinfo_en_c generate
|
||||
neorv32_sysinfo_inst: entity neorv32.neorv32_sysinfo
|
||||
generic map (
|
||||
|
|
@ -1691,7 +1728,7 @@ begin
|
|||
);
|
||||
end generate;
|
||||
|
||||
neorv32_sysinfo_inst_false:
|
||||
neorv32_sysinfo_disabled:
|
||||
if not io_sysinfo_en_c generate
|
||||
iodev_rsp(IODEV_SYSINFO) <= rsp_terminate_c;
|
||||
end generate;
|
||||
|
|
@ -1704,7 +1741,7 @@ begin
|
|||
-- On-Chip Debugger Complex
|
||||
-- **************************************************************************************************************************
|
||||
|
||||
neorv32_ocd_inst_true:
|
||||
neorv32_ocd_enabled:
|
||||
if OCD_EN generate
|
||||
|
||||
-- On-Chip Debugger - Debug Transport Module (DTM) ----------------------------------------
|
||||
|
|
@ -1744,9 +1781,9 @@ begin
|
|||
halt_req_o => dci_haltreq
|
||||
);
|
||||
|
||||
end generate;
|
||||
end generate; -- /neorv32_ocd_enabled
|
||||
|
||||
neorv32_debug_ocd_inst_false:
|
||||
neorv32_debug_ocd_disabled:
|
||||
if not OCD_EN generate
|
||||
iodev_rsp(IODEV_OCD) <= rsp_terminate_c;
|
||||
jtag_tdo_o <= jtag_tdi_i; -- JTAG pass-through
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue