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[sw/lib] update NEOLED HAL

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stnolting 2023-03-07 18:19:04 +01:00
parent 71761fee47
commit 16f69ba6b3
3 changed files with 25 additions and 31 deletions
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12
sw/lib/include/neorv32.h
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@ -1218,31 +1218,31 @@ enum NEORV32_NEOLED_CTRL_enum {
NEOLED_CTRL_PRSC0 = 3, /**< NEOLED control register(3) (r/w): Clock prescaler select bit 0 (pulse-clock speed select) */
NEOLED_CTRL_PRSC1 = 4, /**< NEOLED control register(4) (r/w): Clock prescaler select bit 1 (pulse-clock speed select) */
NEOLED_CTRL_PRSC2 = 5, /**< NEOLED control register(5) (r/w): Clock prescaler select bit 2 (pulse-clock speed select) */
//
NEOLED_CTRL_BUFS_0 = 6, /**< NEOLED control register(6) (r/-): log2(tx buffer size) bit 0 */
NEOLED_CTRL_BUFS_1 = 7, /**< NEOLED control register(7) (r/-): log2(tx buffer size) bit 1 */
NEOLED_CTRL_BUFS_2 = 8, /**< NEOLED control register(8) (r/-): log2(tx buffer size) bit 2 */
NEOLED_CTRL_BUFS_3 = 9, /**< NEOLED control register(9) (r/-): log2(tx buffer size) bit 3 */
//
NEOLED_CTRL_T_TOT_0 = 10, /**< NEOLED control register(10) (r/w): pulse-clock ticks per total period bit 0 */
NEOLED_CTRL_T_TOT_1 = 11, /**< NEOLED control register(11) (r/w): pulse-clock ticks per total period bit 1 */
NEOLED_CTRL_T_TOT_2 = 12, /**< NEOLED control register(12) (r/w): pulse-clock ticks per total period bit 2 */
NEOLED_CTRL_T_TOT_3 = 13, /**< NEOLED control register(13) (r/w): pulse-clock ticks per total period bit 3 */
NEOLED_CTRL_T_TOT_4 = 14, /**< NEOLED control register(14) (r/w): pulse-clock ticks per total period bit 4 */
//
NEOLED_CTRL_T_ZERO_H_0 = 15, /**< NEOLED control register(15) (r/w): pulse-clock ticks per ZERO high-time bit 0 */
NEOLED_CTRL_T_ZERO_H_1 = 16, /**< NEOLED control register(16) (r/w): pulse-clock ticks per ZERO high-time bit 1 */
NEOLED_CTRL_T_ZERO_H_2 = 17, /**< NEOLED control register(17) (r/w): pulse-clock ticks per ZERO high-time bit 2 */
NEOLED_CTRL_T_ZERO_H_3 = 18, /**< NEOLED control register(18) (r/w): pulse-clock ticks per ZERO high-time bit 3 */
NEOLED_CTRL_T_ZERO_H_4 = 19, /**< NEOLED control register(19) (r/w): pulse-clock ticks per ZERO high-time bit 4 */
//
NEOLED_CTRL_T_ONE_H_0 = 20, /**< NEOLED control register(20) (r/w): pulse-clock ticks per ONE high-time bit 0 */
NEOLED_CTRL_T_ONE_H_1 = 21, /**< NEOLED control register(21) (r/w): pulse-clock ticks per ONE high-time bit 1 */
NEOLED_CTRL_T_ONE_H_2 = 22, /**< NEOLED control register(22) (r/w): pulse-clock ticks per ONE high-time bit 2 */
NEOLED_CTRL_T_ONE_H_3 = 23, /**< NEOLED control register(23) (r/w): pulse-clock ticks per ONE high-time bit 3 */
NEOLED_CTRL_T_ONE_H_4 = 24, /**< NEOLED control register(24) (r/w): pulse-clock ticks per ONE high-time bit 4 */
//
NEOLED_CTRL_IRQ_CONF = 27, /**< NEOLED control register(27) (r/w): TX FIFO interrupt: 0=IRQ if FIFO is less than half-full, 1=IRQ if FIFO is empty */
NEOLED_CTRL_IRQ_CONF = 27, /**< NEOLED control register(27) (r/w): TX FIFO interrupt: 1=IRQ if FIFO is empty, 1=IRQ if FIFO is less than half-full */
NEOLED_CTRL_TX_EMPTY = 28, /**< NEOLED control register(28) (r/-): TX FIFO is empty */
NEOLED_CTRL_TX_HALF = 29, /**< NEOLED control register(29) (r/-): TX FIFO is at least half-full */
NEOLED_CTRL_TX_FULL = 30, /**< NEOLED control register(30) (r/-): TX FIFO is full */

6
sw/lib/include/neorv32_neoled.h
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -45,8 +45,8 @@
// prototypes
int neorv32_neoled_available(void);
void neorv32_neoled_setup(uint32_t prsc, uint32_t t_total, uint32_t t_high_zero, uint32_t t_high_one);
void neorv32_neoled_setup_ws2812(void);
void neorv32_neoled_setup(uint32_t prsc, uint32_t t_total, uint32_t t_high_zero, uint32_t t_high_one, int irq_mode);
void neorv32_neoled_setup_ws2812(int irq_mode);
void neorv32_neoled_set_mode(uint32_t mode);
void neorv32_neoled_strobe_blocking(void);
void neorv32_neoled_strobe_nonblocking(void);

38
sw/lib/source/neorv32_neoled.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -62,34 +62,26 @@ int neorv32_neoled_available(void) {
/**********************************************************************//**
* Enable and configure NEOLED controller. The NEOLED control register bits are listed in #NEORV32_NEOLED_CTRL_enum.
* This function performs a "raw" configuration (just configuraing the according control register bit).
* This function performs a "raw" configuration (just configuring the according control register bit).
*
* @param[in] prsc Clock prescaler select (0..7). See #NEORV32_CLOCK_PRSC_enum.
* @param[in] t_total Number of pre-scaled clock ticks for total bit period (0..31).
* @param[in] t_high_zero Number of pre-scaled clock ticks to generate high-time for sending a '0' (0..31).
* @param[in] t_high_one Number of pre-scaled clock ticks to generate high-time for sending a '1' (0..31).
* @param[in] irq_mode Interrupt condition (1=IRQ if FIFO is empty, 1=IRQ if FIFO is less than half-full).
**************************************************************************/
void neorv32_neoled_setup(uint32_t prsc, uint32_t t_total, uint32_t t_high_zero, uint32_t t_high_one) {
void neorv32_neoled_setup(uint32_t prsc, uint32_t t_total, uint32_t t_high_zero, uint32_t t_high_one, int irq_mode) {
NEORV32_NEOLED->CTRL = 0; // reset
// module enable
uint32_t ct_enable = 1 << NEOLED_CTRL_EN;
// clock pre-scaler
uint32_t ct_prsc = (prsc & 0x7) << NEOLED_CTRL_PRSC0;
// serial data output: total period length for one bit
uint32_t ct_t_total = (t_total & 0x1f) << NEOLED_CTRL_T_TOT_0;
// serial data output: high-time for sending a '0'
uint32_t ct_t_zero = (t_high_zero & 0x1f) << NEOLED_CTRL_T_ZERO_H_0;
// serial data output: high-time for sending a '1'
uint32_t ct_t_one = (t_high_one & 0x1f) << NEOLED_CTRL_T_ONE_H_0;
// set new configuration
NEORV32_NEOLED->CTRL = ct_enable | ct_prsc | ct_t_total | ct_t_zero | ct_t_one;
uint32_t tmp = 0;
tmp |= (uint32_t)((1 & 0x01U) << NEOLED_CTRL_EN); // module enable
tmp |= (uint32_t)((prsc & 0x07U) << NEOLED_CTRL_PRSC0); // clock pre-scaler
tmp |= (uint32_t)((t_total & 0x1fU) << NEOLED_CTRL_T_TOT_0); // serial data output: total period length for one bit
tmp |= (uint32_t)((t_high_zero & 0x1fU) << NEOLED_CTRL_T_ZERO_H_0); // serial data output: high-time for sending a '0'
tmp |= (uint32_t)((t_high_one & 0x1fU) << NEOLED_CTRL_T_ONE_H_0); // serial data output: high-time for sending a '1'
tmp |= (uint32_t)((irq_mode & 0x01U) << NEOLED_CTRL_EN); // interrupt mode
NEORV32_NEOLED->CTRL = tmp;
}
@ -99,8 +91,10 @@ void neorv32_neoled_setup(uint32_t prsc, uint32_t t_total, uint32_t t_high_zero,
*
* @note WS2812 timing: T_period = 1.2us, T_high_zero = 0.4us, T_high_one = 0.8us. Change the constants if required.
* @note This function uses the SYSINFO_CLK value (from the SYSINFO HW module) to do the timing computations.
*
* @param[in] irq_mode Interrupt condition (1=IRQ if FIFO is empty, 1=IRQ if FIFO is less than half-full).
**************************************************************************/
void neorv32_neoled_setup_ws2812(void) {
void neorv32_neoled_setup_ws2812(int irq_mode) {
// WS2812 timing
const uint32_t T_TOTAL_C = 1200; // ns
@ -150,7 +144,7 @@ void neorv32_neoled_setup_ws2812(void) {
}
// set raw configuration
neorv32_neoled_setup(clk_prsc_sel, t_total, t_high_zero, t_high_one);
neorv32_neoled_setup(clk_prsc_sel, t_total, t_high_zero, t_high_one, irq_mode);
}