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[linker script] constrain IMEM/rom size

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to actual physical size
This commit is contained in:
stnolting 2024-10-20 20:28:31 +02:00
parent 9243491a65
commit 17518fc590
1 changed files with 8 additions and 10 deletions
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18
sw/common/neorv32.ld
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@ -1,5 +1,5 @@
/* ================================================================================ */
/* NEORV32 CPU - RISC-V GCC Linker Script */
/* NEORV32 - RISC-V GCC Linker Script */
/* -------------------------------------------------------------------------------- */
/* The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 */
/* Copyright (c) NEORV32 contributors. */
@ -13,7 +13,6 @@
* are permitted in any medium without royalty provided the copyright
* notice and this notice are preserved. */
OUTPUT_FORMAT("elf32-littleriscv")
OUTPUT_ARCH(riscv)
ENTRY(_start)
@ -25,25 +24,24 @@ SEARCH_DIR("=/usr/lib")
/* ************************************************************************************************* */
/* +++ NEORV32 memory layout configuration +++ */
/* If the symbols are not explicitly defined the default configurations are used. If required, only */
/* edit the very last entry in each row. */
/* If the symbols are not explicitly defined the default configurations are used. */
/* NOTE: section sizes have to be a multiple of 4 bytes; base addresses have to be 32-bit-aligned. */
/* ************************************************************************************************* */
/* Default rom/ram (IMEM/DMEM) sizes */
__neorv32_rom_size = DEFINED(__neorv32_rom_size) ? __neorv32_rom_size : 2048M;
__neorv32_ram_size = DEFINED(__neorv32_ram_size) ? __neorv32_ram_size : 8K;
/* Default HEAP size (= 0; no heap at all) */
__neorv32_heap_size = DEFINED(__neorv32_heap_size) ? __neorv32_heap_size : 0;
/* Default section base addresses */
/* Default rom/ram (IMEM/DMEM) sizes */
__neorv32_rom_size = DEFINED(__neorv32_rom_size) ? __neorv32_rom_size : 16k;
__neorv32_ram_size = DEFINED(__neorv32_ram_size) ? __neorv32_ram_size : 8K;
/* Default rom/ram (IMEM/DMEM) base addresses */
__neorv32_rom_base = DEFINED(__neorv32_rom_base) ? __neorv32_rom_base : 0x00000000;
__neorv32_ram_base = DEFINED(__neorv32_ram_base) ? __neorv32_ram_base : 0x80000000;
/* ************************************************************************************************* */
/* when compiling the bootloader the ROM section is automatically re-mapped to the */
/* When compiling the bootloader the ROM section is automatically re-mapped to the */
/* processor-internal bootloader ROM address space. */
/* ************************************************************************************************* */
MEMORY