mirror of
https://github.com/stnolting/neorv32.git
synced 2025-04-19 11:55:05 -04:00
Merge branch 'main' into rework_bootloader
This commit is contained in:
stnolting
GitHub
commit
31f418edfd
20 changed files with 422 additions and 317 deletions
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|
@ -29,6 +29,7 @@ mimpid = 0x01040312 -> Version 01.04.03.12 -> v1.4.3.12
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| Date | Version | Comment | Ticket |
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||||
|:----:|:-------:|:--------|:------:|
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| 12.04.2025 | 1.11.2.7 | :sparkles: add PWM polarity configuration | [#1230](https://github.com/stnolting/neorv32/pull/1230) |
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| 07.04.2025 | 1.11.2.6 | :bug: fix SDI input synchronization | [#1227](https://github.com/stnolting/neorv32/pull/1227) |
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| 05.04.2025 | 1.11.2.5 | minor rtl edits and optimizations | [#1225](https://github.com/stnolting/neorv32/pull/1225) |
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| 01.04.2025 | 1.11.2.4 | :bug: fix bug in PWM clock prescaler | [#1222](https://github.com/stnolting/neorv32/pull/1222) |
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|
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@ -30,13 +30,14 @@ Depending on the configured number channels, the PWM module provides 16 configur
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be accessed without raising an exception. However, registers above `IO_PWM_NUM_CH-1` are read-only and hardwired to
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all-zero.
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||||
Each configuration provides a 1-bit enable flag to enable/disable the according channel, an 8-bit register for setting
|
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the duty cycle and a 3-bit clock prescaler select as well as a 10-bit clock diver for _coarse_ and _fine_ tuning of the
|
||||
carrier frequency, respectively.
|
||||
Each configuration provides a 1-bit enable flag to enable/disable the according channel, a 1-bit flag for setting the
|
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channel polarity, an 8-bit register for setting the duty cycle and a 3-bit clock prescaler select as well as a 10-bit clock
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diver for _coarse_ and _fine_ tuning of the carrier frequency, respectively.
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A channel is enabled by setting the `PWM_CFG_EN` bit. If this bit is cleared the according PWM output is set to zero.
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The duty cycle is programmed via the 8 `PWM_CFG_DUTY` bits. Based on the value programmed to this bits the duty cycle
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the resulting duty cycle of the according channel can be computed by the following formula:
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A channel is enabled by setting the `PWM_CFG_EN` bit. If this bit is cleared the according PWM output is deasserted
|
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(zero if channel polarity is not inverted, one if inverted). The duty cycle is programmed via the 8 `PWM_CFG_DUTY` bits.
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Based on the value programmed to these bits the resulting duty cycle of the according channel can be computed by the
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following formula:
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_Duty Cycle_[%] = `PWM_CFG_DUTY` / 2^8^
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@ -66,13 +67,15 @@ _f~PWM~_[Hz] = _f~main~_[Hz] / (2^8^ * `clock_prescaler` * (1 + `PWM_CFG_CDIV`))
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| Address | Name [C] | Bit(s), Name [C] | R/W | Function
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.5+<| `0xfff00000` .5+<| `CHANNEL_CFG[0]` <|`31` - `PWM_CFG_EN` ^| r/w <| Channel 0: channel enabled when set
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<|`30:28` - `PWM_CFG_PRSC_MSB:PWM_CFG_PRSC_LSB` ^| r/w <| Channel 0: 3-bit clock prescaler select
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<|`27:18` ^| r/- <| Channel 0: _reserved_, hardwired to zero
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<|`27` - `PWM_CFG_POL` ^| r/w <| Channel 0: channel polarity, inverted when set
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<|`26:18` ^| r/- <| Channel 0: _reserved_, hardwired to zero
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<|`17:8` - `PWM_CFG_CDIV_MSB:PWM_CFG_CDIV_LSB` ^| r/w <| Channel 0: 10-bit clock divider
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<|`7:0` - `PWM_CFG_DUTY_MSB:PWM_CFG_DUTY_LSB` ^| r/w <| Channel 0: 8-bit duty cycle
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| `0xfff00004` ... `0xfff00038` | `CHANNEL_CFG[1]` ... `CHANNEL_CFG[14]` | ... | r/w <| Channels 1 to 14
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.5+<| `0xfff0003C` .5+<| `CHANNEL_CFG[15]` <|`31` - `PWM_CFG_EN` ^| r/w <| Channel 15: channel enabled when set
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<|`30:28` - `PWM_CFG_PRSC_MSB:PWM_CFG_PRSC_LSB` ^| r/w <| Channel 15: 3-bit clock prescaler select
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<|`27:18` ^| r/- <| Channel 15: _reserved_, hardwired to zero
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<|`27` - `PWM_CFG_POL` ^| r/w <| Channel 15: channel polarity, inverted when set
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<|`26:18` ^| r/- <| Channel 15: _reserved_, hardwired to zero
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<|`17:8` - `PWM_CFG_CDIV_MSB:PWM_CFG_CDIV_LSB` ^| r/w <| Channel 15: 10-bit clock divider
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<|`7:0` - `PWM_CFG_DUTY_MSB:PWM_CFG_DUTY_LSB` ^| r/w <| Channel 15: 8-bit duty cycle
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|=======================
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@ -126,11 +126,11 @@ include $(NEORV32_HOME)/sw/common/common.mk
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```
|
||||
|
||||
Thus, the functionality of the central makefile (including all targets) becomes available for the project.
|
||||
The project-local makefile should be used to define all setup-relevant configuration options instead of changing the
|
||||
A project-local makefile should be used to define all setup-relevant configuration options instead of changing the
|
||||
central makefile to keep the code base clean. Setting variables in the project-local makefile will override the default
|
||||
configuration. Most example projects already provide a makefile that list all relevant configuration options.
|
||||
|
||||
The following example shows all relevant configuration variables:
|
||||
The following example shows the configuration of a local Makefile:
|
||||
|
||||
```makefile
|
||||
# Override the default CPU ISA
|
||||
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@ -142,30 +142,23 @@ RISCV_PREFIX ?= riscv-none-elf-
|
|||
# Override default optimization goal
|
||||
EFFORT = -Os
|
||||
|
||||
# Add extended debug symbols
|
||||
# Add extended debug symbols for Eclipse
|
||||
USER_FLAGS += -ggdb -gdwarf-3
|
||||
|
||||
# Additional sources
|
||||
APP_SRC += $(wildcard ./*.c)
|
||||
APP_INC += -I .
|
||||
|
||||
# Adjust processor IMEM size
|
||||
# Adjust processor IMEM size and base address
|
||||
USER_FLAGS += -Wl,--defsym,__neorv32_rom_size=16k
|
||||
USER_FLAGS += -Wl,--defsym,__neorv32_rom_base=0x00000000
|
||||
|
||||
# Adjust processor DMEM size
|
||||
# Adjust processor DMEM size and base address
|
||||
USER_FLAGS += -Wl,--defsym,__neorv32_ram_size=8k
|
||||
USER_FLAGS += -Wl,--defsym,__neorv32_ram_base=0x80000000
|
||||
|
||||
# Adjust maximum heap size
|
||||
USER_FLAGS += -Wl,--defsym,__neorv32_heap_size=1k
|
||||
|
||||
# Reduce library footprint when no UART is synthesized
|
||||
#USER_FLAGS += -DUART_DISABLED
|
||||
|
||||
# Enable link-time-optimization
|
||||
#USER_FLAGS += -flto
|
||||
|
||||
# Additional compiler flags (append to this variable)
|
||||
#USER_FLAGS += ...
|
||||
USER_FLAGS += -Wl,--defsym,__neorv32_heap_size=2k
|
||||
|
||||
# Set path to NEORV32 root directory
|
||||
NEORV32_HOME ?= ../../..
|
||||
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@ -192,47 +185,50 @@ available targets as well as all variable including their _current_ setting.
|
|||
neorv32/sw/example/hello_world$ make
|
||||
NEORV32 Software Makefile
|
||||
Find more information at https://github.com/stnolting/neorv32
|
||||
Use make V=1 or set BUILD_VERBOSE to increase build verbosity
|
||||
|
||||
Targets:
|
||||
|
||||
help - show this text
|
||||
check - check toolchain
|
||||
info - show makefile/toolchain configuration
|
||||
gdb - start GNU debugging session
|
||||
asm - compile and generate <main.asm> assembly listing file for manual debugging
|
||||
elf - compile and generate <main.elf> ELF file
|
||||
exe - compile and generate <neorv32_exe.bin> executable image file for bootloader upload (includes a HEADER!)
|
||||
bin - compile and generate <neorv32_raw_exe.bin> executable memory image
|
||||
hex - compile and generate <neorv32_raw_exe.hex> executable memory image
|
||||
coe - compile and generate <neorv32_raw_exe.coe> executable memory image
|
||||
mem - compile and generate <neorv32_raw_exe.mem> executable memory image
|
||||
mif - compile and generate <neorv32_raw_exe.mif> executable memory image
|
||||
image - compile and generate VHDL IMEM application boot image <neorv32_application_image.vhd> in local folder
|
||||
install - compile, generate and install VHDL IMEM application boot image <neorv32_application_image.vhd>
|
||||
sim - in-console simulation using default/simple testbench and GHDL
|
||||
hdl_lists - regenerate HDL file-lists (*.f) in NEORV32_HOME/rtl
|
||||
all - exe + install + hex + bin + asm
|
||||
elf_info - show ELF layout info
|
||||
elf_sections - show ELF sections
|
||||
clean - clean up project home folder
|
||||
clean_all - clean up project home folder and image generator
|
||||
bl_image - compile and generate VHDL BOOTROM bootloader boot image <neorv32_bootloader_image.vhd> in local folder
|
||||
bootloader - compile, generate and install VHDL BOOTROM bootloader boot image <neorv32_bootloader_image.vhd>
|
||||
help show this text
|
||||
check check toolchain
|
||||
info show makefile/toolchain configuration
|
||||
gdb start GNU debugging session
|
||||
asm compile and generate <main.asm> assembly listing file for manual debugging
|
||||
elf compile and generate <main.elf> ELF file
|
||||
exe compile and generate <neorv32_exe.bin> executable image file for bootloader upload (includes a HEADER!)
|
||||
bin compile and generate <neorv32_raw_exe.bin> executable memory image
|
||||
hex compile and generate <neorv32_raw_exe.hex> executable memory image
|
||||
coe compile and generate <neorv32_raw_exe.coe> executable memory image
|
||||
mem compile and generate <neorv32_raw_exe.mem> executable memory image
|
||||
mif compile and generate <neorv32_raw_exe.mif> executable memory image
|
||||
image compile and generate VHDL IMEM application boot image <neorv32_application_image.vhd> in local folder
|
||||
install compile, generate and install VHDL IMEM application boot image <neorv32_application_image.vhd>
|
||||
sim in-console simulation using default/simple testbench and GHDL
|
||||
hdl_lists regenerate HDL file-lists (*.f) in NEORV32_HOME/rtl
|
||||
all exe + install + hex + bin + asm
|
||||
elf_info show ELF layout info
|
||||
elf_sections show ELF sections
|
||||
clean clean up project home folder
|
||||
clean_all clean up project home folder and image generator
|
||||
bl_image compile and generate VHDL BOOTROM bootloader boot image <neorv32_bootloader_image.vhd> in local folder
|
||||
bootloader compile, generate and install VHDL BOOTROM bootloader boot image <neorv32_bootloader_image.vhd>
|
||||
|
||||
Variables:
|
||||
|
||||
USER_FLAGS - Custom toolchain flags [append only]: "-ggdb -gdwarf-3 -Wl,--defsym,__neorv32_rom_size=16k -Wl,--defsym,__neorv32_ram_size=8k"
|
||||
USER_LIBS - Custom libraries [append only]: ""
|
||||
EFFORT - Optimization level: "-Os"
|
||||
MARCH - Machine architecture: "rv32i_zicsr_zifencei"
|
||||
MABI - Machine binary interface: "ilp32"
|
||||
APP_INC - C include folder(s) [append only]: "-I ."
|
||||
APP_SRC - C source folder(s) [append only]: "./main.c "
|
||||
ASM_INC - ASM include folder(s) [append only]: "-I ."
|
||||
RISCV_PREFIX - Toolchain prefix: "riscv-none-elf-"
|
||||
NEORV32_HOME - NEORV32 home folder: "../../.."
|
||||
GDB_ARGS - GDB (connection) arguments: "-ex target extended-remote localhost:3333"
|
||||
GHDL_RUN_FLAGS - GHDL simulation run arguments: ""
|
||||
BUILD_VERBOSE Set to increase build verbosity: 0
|
||||
USER_FLAGS Custom toolchain flags [append only]: "-ggdb -gdwarf-3 -Wl,--defsym,__neorv32_rom_size=16k -Wl,--defsym,__neorv32_ram_size=8k"
|
||||
USER_LIBS Custom libraries [append only]: ""
|
||||
EFFORT Optimization level: "-Os"
|
||||
MARCH Machine architecture: "rv32i_zicsr_zifencei"
|
||||
MABI Machine binary interface: "ilp32"
|
||||
APP_INC C include folder(s) [append only]: "-I ."
|
||||
APP_SRC C source folder(s) [append only]: "./main.c "
|
||||
APP_OBJ Object file(s) [append only]
|
||||
ASM_INC ASM include folder(s) [append only]: "-I ."
|
||||
RISCV_PREFIX Toolchain prefix: "riscv-none-elf-"
|
||||
NEORV32_HOME NEORV32 home folder: "../../.."
|
||||
GDB_ARGS GDB (connection) arguments: "-ex target extended-remote localhost:3333"
|
||||
GHDL_RUN_FLAGS GHDL simulation run arguments: ""
|
||||
----
|
||||
|
||||
.Build Artifacts
|
||||
|
|
@ -241,6 +237,10 @@ All _intermediate_ build artifacts (like object files and binaries) will be plac
|
|||
folder named `build`. The _resulting_ build artifacts (like executable, the main ELF and all memory
|
||||
initialization/image files) will be placed in the root project folder.
|
||||
|
||||
.Increse Verbosity
|
||||
[TIP]
|
||||
Use `make V=1` or set `BUILD_VERBOSE` in your environment to increase build verbosity.
|
||||
|
||||
|
||||
:sectnums:
|
||||
==== Default Compiler Flags
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@ package neorv32_package is
|
|||
|
||||
-- Architecture Constants -----------------------------------------------------------------
|
||||
-- -------------------------------------------------------------------------------------------
|
||||
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01110206"; -- hardware version
|
||||
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01110207"; -- hardware version
|
||||
constant archid_c : natural := 19; -- official RISC-V architecture ID
|
||||
constant XLEN : natural := 32; -- native data path width
|
||||
|
||||
|
|
|
|||
|
|
@ -158,6 +158,7 @@ architecture neorv32_pwm_channel_rtl of neorv32_pwm_channel is
|
|||
-- configuration register --
|
||||
signal cfg_en : std_ulogic; -- channel enable
|
||||
signal cfg_prsc : std_ulogic_vector(2 downto 0); -- (course) clock prescaler select
|
||||
signal cfg_pol : std_ulogic; -- channel polarity
|
||||
signal cfg_cdiv : std_ulogic_vector(9 downto 0); -- (fine) clock divider
|
||||
signal cfg_duty : std_ulogic_vector(7 downto 0); -- duty cycle
|
||||
|
||||
|
|
@ -175,12 +176,14 @@ begin
|
|||
if (rstn_i = '0') then
|
||||
cfg_en <= '0';
|
||||
cfg_prsc <= (others => '0');
|
||||
cfg_pol <= '0';
|
||||
cfg_cdiv <= (others => '0');
|
||||
cfg_duty <= (others => '0');
|
||||
elsif rising_edge(clk_i) then
|
||||
if (we_i = '1') then
|
||||
cfg_en <= wdata_i(31);
|
||||
cfg_prsc <= wdata_i(30 downto 28);
|
||||
cfg_pol <= wdata_i(27);
|
||||
cfg_cdiv <= wdata_i(17 downto 8);
|
||||
cfg_duty <= wdata_i(7 downto 0);
|
||||
end if;
|
||||
|
|
@ -188,7 +191,7 @@ begin
|
|||
end process config_write;
|
||||
|
||||
-- read access --
|
||||
rdata_o <= cfg_en & cfg_prsc & "0000000000" & cfg_cdiv & cfg_duty when (re_i = '1') else (others => '0');
|
||||
rdata_o <= cfg_en & cfg_prsc & cfg_pol & "000000000" & cfg_cdiv & cfg_duty when (re_i = '1') else (others => '0');
|
||||
|
||||
-- enable global clock generator --
|
||||
clkgen_en_o <= cfg_en;
|
||||
|
|
@ -226,9 +229,9 @@ begin
|
|||
|
||||
-- pwm output --
|
||||
if (cfg_en = '0') or (unsigned(cnt_duty) >= unsigned(cfg_duty)) then
|
||||
pwm_o <= '0';
|
||||
pwm_o <= cfg_pol; -- deasserted
|
||||
else
|
||||
pwm_o <= '1';
|
||||
pwm_o <= not cfg_pol; -- asserted
|
||||
end if;
|
||||
|
||||
end if;
|
||||
|
|
|
|||
|
|
@ -18,6 +18,9 @@
|
|||
# User's application sources (*.c, *.cpp, *.s, *.S); add additional files here
|
||||
APP_SRC ?= $(wildcard ./*.c) $(wildcard ./*.s) $(wildcard ./*.cpp) $(wildcard ./*.S)
|
||||
|
||||
# User's application object files (*.o, *.cpp, *.s, *.S); add additional files here
|
||||
APP_OBJ ?=
|
||||
|
||||
# User's application include folders (don't forget the '-I' before each entry)
|
||||
APP_INC ?= -I .
|
||||
# User's application include folders - for assembly files only (don't forget the '-I' before each entry)
|
||||
|
|
@ -41,7 +44,6 @@ USER_FLAGS ?=
|
|||
|
||||
# Relative or absolute path to the NEORV32 home folder
|
||||
NEORV32_HOME ?= ../../..
|
||||
NEORV32_LOCAL_RTL ?= $(NEORV32_HOME)/rtl
|
||||
|
||||
# GDB arguments
|
||||
GDB_ARGS ?= -ex "target extended-remote localhost:3333"
|
||||
|
|
@ -62,11 +64,9 @@ NEORV32_SRC_PATH = $(NEORV32_HOME)/sw/lib/source
|
|||
# Path to NEORV32 executable generator
|
||||
NEORV32_EXG_PATH = $(NEORV32_HOME)/sw/image_gen
|
||||
# Path to NEORV32 rtl folder
|
||||
NEORV32_RTL_PATH = $(NEORV32_LOCAL_RTL)
|
||||
NEORV32_RTL_PATH = $(NEORV32_HOME)/rtl
|
||||
# Path to NEORV32 sim folder
|
||||
NEORV32_SIM_PATH = $(NEORV32_HOME)/sim
|
||||
# Marker file to check for NEORV32 home folder
|
||||
NEORV32_HOME_MARKER = $(NEORV32_INC_PATH)/neorv32.h
|
||||
|
||||
# Core libraries (peripheral and CPU drivers)
|
||||
CORE_SRC = $(wildcard $(NEORV32_SRC_PATH)/*.c)
|
||||
|
|
@ -97,12 +97,9 @@ SRC += $(CORE_SRC)
|
|||
# Define search path for prerequisites
|
||||
VPATH = $(sort $(dir $(SRC)))
|
||||
|
||||
# Create the build directories if they don't exist
|
||||
$(BUILD_DIR):
|
||||
@mkdir -p $(BUILD_DIR)
|
||||
|
||||
# Define all object files
|
||||
OBJ := $(patsubst %,$(BUILD_DIR)/%.o,$(notdir $(SRC)))
|
||||
OBJ += $(APP_OBJ)
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Tools and flags
|
||||
|
|
@ -119,21 +116,27 @@ GDB = $(RISCV_PREFIX)gdb
|
|||
# Host's native compiler
|
||||
CC_HOST = gcc -Wall -O -g
|
||||
|
||||
# System tools
|
||||
ECHO = @echo
|
||||
SET = set
|
||||
CP = cp
|
||||
RM = rm
|
||||
MKDIR = mkdir
|
||||
SH = sh
|
||||
WC = wc
|
||||
|
||||
# NEORV32 executable image generator
|
||||
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen
|
||||
ifeq ($(OS),Windows_NT)
|
||||
IMAGE_GEN := $(IMAGE_GEN).exe
|
||||
IMAGE_GEN := $(IMAGE_GEN).exe
|
||||
endif
|
||||
|
||||
# Compiler & linker flags
|
||||
CC_OPTS = -march=$(MARCH) -mabi=$(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles -mno-fdiv
|
||||
CC_OPTS += -mstrict-align -mbranch-cost=10 -Wl,--gc-sections -ffp-contract=off -g
|
||||
CC_OPTS += $(USER_FLAGS)
|
||||
LD_LIBS = -lm -lc -lgcc
|
||||
LD_LIBS += $(USER_LIBS)
|
||||
|
||||
# Actual flags passed to the compiler
|
||||
CC_FLAGS = $(CC_OPTS)
|
||||
CC_FLAGS = -march=$(MARCH) -mabi=$(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -nostartfiles -mno-fdiv
|
||||
CC_FLAGS += -mstrict-align -mbranch-cost=10 -Wl,--gc-sections -ffp-contract=off -g
|
||||
CC_FLAGS += $(USER_FLAGS)
|
||||
LD_LIBS = -lm -lc -lgcc
|
||||
LD_LIBS += $(USER_LIBS)
|
||||
|
||||
# Allow users to use tool-specific flags
|
||||
# Uses naming from https://www.gnu.org/software/make/manual/html_node/Implicit-Variables.html
|
||||
|
|
@ -149,8 +152,8 @@ NEO_ASFLAGS = $(CC_FLAGS) $(ASFLAGS)
|
|||
.PHONY: check info help elf_info clean clean_all
|
||||
.DEFAULT_GOAL := help
|
||||
|
||||
asm: $(APP_ASM)
|
||||
elf: $(APP_ELF)
|
||||
asm: $(APP_ASM)
|
||||
exe: $(APP_EXE)
|
||||
hex: $(APP_HEX)
|
||||
bin: $(APP_BIN)
|
||||
|
|
@ -159,7 +162,35 @@ mem: $(APP_MEM)
|
|||
mif: $(APP_MIF)
|
||||
image: $(APP_VHD)
|
||||
install: image install-$(APP_VHD)
|
||||
all: $(APP_ASM) $(APP_EXE) $(APP_HEX) $(APP_BIN) $(APP_COE) $(APP_MEM) $(APP_MIF) $(APP_VHD) install hex bin
|
||||
all: $(APP_ELF) $(APP_ASM) $(APP_EXE) $(APP_HEX) $(APP_BIN) $(APP_COE) $(APP_MEM) $(APP_MIF) $(APP_VHD) install hex bin
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Verbosity
|
||||
# -----------------------------------------------------------------------------
|
||||
|
||||
ifeq ("$(origin V)", "command line")
|
||||
BUILD_VERBOSE=$(V)
|
||||
endif
|
||||
ifndef BUILD_VERBOSE
|
||||
BUILD_VERBOSE = 0
|
||||
endif
|
||||
ifeq ($(BUILD_VERBOSE),0)
|
||||
Q = @
|
||||
else
|
||||
Q =
|
||||
endif
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Git tag and commit hash
|
||||
# -----------------------------------------------------------------------------
|
||||
|
||||
NEORV32_GIT_TAG = "unknown"
|
||||
# check if git is available at all
|
||||
ifneq (, $(shell git 2>/dev/null))
|
||||
$(eval NEORV32_GIT_TAG = $(shell git describe --tags))
|
||||
endif
|
||||
# add short commit hash as C define
|
||||
NEO_CFLAGS += -DNEORV32_GIT_TAG="\"$(NEORV32_GIT_TAG)\""
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Image generator targets
|
||||
|
|
@ -167,48 +198,47 @@ all: $(APP_ASM) $(APP_EXE) $(APP_HEX) $(APP_BIN) $(APP_COE) $(APP_MEM) $(APP
|
|||
|
||||
# Compile image generator
|
||||
$(IMAGE_GEN): $(NEORV32_EXG_PATH)/image_gen.c
|
||||
@echo Compiling image generator...
|
||||
@$(CC_HOST) $< -o $(IMAGE_GEN)
|
||||
$(ECHO) Compiling image generator...
|
||||
$(Q)$(CC_HOST) $< -o $(IMAGE_GEN)
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# General targets: Assemble, compile, link, dump
|
||||
# -----------------------------------------------------------------------------
|
||||
|
||||
# Create the build directories if they don't exist
|
||||
$(BUILD_DIR):
|
||||
$(Q)$(MKDIR) -p $(BUILD_DIR)
|
||||
|
||||
# Compile app *.s sources (assembly)
|
||||
$(BUILD_DIR)/%.s.o: %.s | $(BUILD_DIR)
|
||||
@$(CC) -c $(NEO_ASFLAGS) -MMD -MP -MF $(BUILD_DIR)/$*.s.d -MT $(BUILD_DIR)/$*.s.o -I $(NEORV32_INC_PATH) $(ASM_INC) $< -o $@
|
||||
$(Q)$(CC) -c $(NEO_ASFLAGS) -MMD -MP -MF $(BUILD_DIR)/$*.s.d -MT $(BUILD_DIR)/$*.s.o -I $(NEORV32_INC_PATH) $(ASM_INC) $< -o $@
|
||||
|
||||
# Compile app *.S sources (assembly + C pre-processor)
|
||||
$(BUILD_DIR)/%.S.o: %.S | $(BUILD_DIR)
|
||||
@$(CC) -c $(NEO_ASFLAGS) -MMD -MP -MF $(BUILD_DIR)/$*.S.d -MT $(BUILD_DIR)/$*.S.o -I $(NEORV32_INC_PATH) $(ASM_INC) $< -o $@
|
||||
$(Q)$(CC) -c $(NEO_ASFLAGS) -MMD -MP -MF $(BUILD_DIR)/$*.S.d -MT $(BUILD_DIR)/$*.S.o -I $(NEORV32_INC_PATH) $(ASM_INC) $< -o $@
|
||||
|
||||
# Compile app *.c sources
|
||||
$(BUILD_DIR)/%.c.o: %.c | $(BUILD_DIR)
|
||||
@$(CC) -c $(NEO_CFLAGS) -MMD -MP -MF $(BUILD_DIR)/$*.c.d -MT $(BUILD_DIR)/$*.c.o -I $(NEORV32_INC_PATH) $(APP_INC) $< -o $@
|
||||
$(Q)$(CC) -c $(NEO_CFLAGS) -MMD -MP -MF $(BUILD_DIR)/$*.c.d -MT $(BUILD_DIR)/$*.c.o -I $(NEORV32_INC_PATH) $(APP_INC) $< -o $@
|
||||
|
||||
# Compile app *.cpp sources
|
||||
$(BUILD_DIR)/%.cpp.o: %.cpp | $(BUILD_DIR)
|
||||
@$(CC) -c $(NEO_CXXFLAGS) -MMD -MP -MF $(BUILD_DIR)/$*.cpp.d -MT $(BUILD_DIR)/$*.cpp.o -I $(NEORV32_INC_PATH) $(APP_INC) $< -o $@
|
||||
|
||||
-include $(OBJ:.o=.d)
|
||||
$(Q)$(CC) -c $(NEO_CXXFLAGS) -MMD -MP -MF $(BUILD_DIR)/$*.cpp.d -MT $(BUILD_DIR)/$*.cpp.o -I $(NEORV32_INC_PATH) $(APP_INC) $< -o $@
|
||||
|
||||
# Link object files and show memory utilization
|
||||
-include $(OBJ:.o=.d)
|
||||
$(APP_ELF): $(OBJ)
|
||||
@$(CC) $(NEO_LDFLAGS) -T $(LD_SCRIPT) $^ $(LD_LIBS) -o $@
|
||||
@echo "Memory utilization:"
|
||||
@$(SIZE) $(APP_ELF)
|
||||
$(Q)$(CC) $(NEO_LDFLAGS) -T $(LD_SCRIPT) $^ $(LD_LIBS) -o $@
|
||||
$(ECHO) "Memory utilization:"
|
||||
$(Q)$(SIZE) $(APP_ELF)
|
||||
|
||||
# Assembly listing file (for debugging)
|
||||
$(APP_ASM): $(APP_ELF)
|
||||
@$(OBJDUMP) -d -S -z $< > $@
|
||||
$(Q)$(OBJDUMP) -d -S -z $< > $@
|
||||
|
||||
# Generate final executable from .text + .rodata + .data (in THIS order!)
|
||||
$(BIN_MAIN): $(APP_ELF) | $(BUILD_DIR)
|
||||
@$(OBJCOPY) -I elf32-little $< -j .text -O binary text.bin
|
||||
@$(OBJCOPY) -I elf32-little $< -j .rodata -O binary rodata.bin
|
||||
@$(OBJCOPY) -I elf32-little $< -j .data -O binary data.bin
|
||||
@cat text.bin rodata.bin data.bin > $@
|
||||
@rm -f text.bin rodata.bin data.bin
|
||||
$(Q)$(OBJCOPY) -I elf32-little $< -j .text -j .rodata -j .data -O binary $@
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Application targets: Generate executable formats
|
||||
|
|
@ -216,47 +246,47 @@ $(BIN_MAIN): $(APP_ELF) | $(BUILD_DIR)
|
|||
|
||||
# Generate NEORV32 executable image for upload via bootloader
|
||||
$(APP_EXE): $(BIN_MAIN) $(IMAGE_GEN)
|
||||
@set -e
|
||||
@echo "Generating $(APP_EXE)"
|
||||
@$(IMAGE_GEN) -app_bin $< $@ $(shell basename $(CURDIR))
|
||||
@echo "Executable size in bytes:"
|
||||
@wc -c < $(APP_EXE)
|
||||
$(Q)$(SET) -e
|
||||
$(ECHO) "Generating $(APP_EXE)"
|
||||
$(Q)$(IMAGE_GEN) -app_bin $< $@ $(shell basename $(CURDIR))
|
||||
$(ECHO) "Executable size in bytes:"
|
||||
$(Q)$(WC) -c < $(APP_EXE)
|
||||
|
||||
# Generate NEORV32 executable VHDL boot image
|
||||
$(APP_VHD): $(BIN_MAIN) $(IMAGE_GEN)
|
||||
@set -e
|
||||
@echo "Generating $(APP_VHD)"
|
||||
@$(IMAGE_GEN) -app_vhd $< $@ $(shell basename $(CURDIR))
|
||||
$(Q)$(SET) -e
|
||||
$(ECHO) "Generating $(APP_VHD)"
|
||||
$(Q)$(IMAGE_GEN) -app_vhd $< $@ $(shell basename $(CURDIR))
|
||||
|
||||
# Generate NEORV32 RAW executable image in plain hex format
|
||||
$(APP_HEX): $(BIN_MAIN) $(IMAGE_GEN)
|
||||
@set -e
|
||||
@echo "Generating $(APP_HEX)"
|
||||
@$(IMAGE_GEN) -raw_hex $< $@ $(shell basename $(CURDIR))
|
||||
$(Q)$(SET) -e
|
||||
$(ECHO) "Generating $(APP_HEX)"
|
||||
$(Q)$(IMAGE_GEN) -raw_hex $< $@ $(shell basename $(CURDIR))
|
||||
|
||||
# Generate NEORV32 RAW executable image in binary format
|
||||
$(APP_BIN): $(BIN_MAIN) $(IMAGE_GEN)
|
||||
@set -e
|
||||
@echo "Generating $(APP_BIN)"
|
||||
@$(IMAGE_GEN) -raw_bin $< $@ $(shell basename $(CURDIR))
|
||||
$(Q)$(SET) -e
|
||||
$(ECHO) "Generating $(APP_BIN)"
|
||||
$(Q)$(IMAGE_GEN) -raw_bin $< $@ $(shell basename $(CURDIR))
|
||||
|
||||
# Generate NEORV32 RAW executable image in COE format
|
||||
$(APP_COE): $(BIN_MAIN) $(IMAGE_GEN)
|
||||
@set -e
|
||||
@echo "Generating $(APP_COE)"
|
||||
@$(IMAGE_GEN) -raw_coe $< $@ $(shell basename $(CURDIR))
|
||||
$(Q)$(SET) -e
|
||||
$(ECHO) "Generating $(APP_COE)"
|
||||
$(Q)$(IMAGE_GEN) -raw_coe $< $@ $(shell basename $(CURDIR))
|
||||
|
||||
# Generate NEORV32 RAW executable image in MIF format
|
||||
$(APP_MIF): $(BIN_MAIN) $(IMAGE_GEN)
|
||||
@set -e
|
||||
@echo "Generating $(APP_MIF)"
|
||||
@$(IMAGE_GEN) -raw_mif $< $@ $(shell basename $(CURDIR))
|
||||
$(Q)$(SET) -e
|
||||
$(ECHO) "Generating $(APP_MIF)"
|
||||
$(Q)$(IMAGE_GEN) -raw_mif $< $@ $(shell basename $(CURDIR))
|
||||
|
||||
# Generate NEORV32 RAW executable image in MEM format
|
||||
$(APP_MEM): $(BIN_MAIN) $(IMAGE_GEN)
|
||||
@set -e
|
||||
@echo "Generating $(APP_MEM)"
|
||||
@$(IMAGE_GEN) -raw_mem $< $@ $(shell basename $(CURDIR))
|
||||
$(Q)$(SET) -e
|
||||
$(ECHO) "Generating $(APP_MEM)"
|
||||
$(Q)$(IMAGE_GEN) -raw_mem $< $@ $(shell basename $(CURDIR))
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# BOOTROM / bootloader image targets
|
||||
|
|
@ -264,175 +294,181 @@ $(APP_MEM): $(BIN_MAIN) $(IMAGE_GEN)
|
|||
|
||||
# Create local VHDL BOOTROM image
|
||||
bl_image: $(BIN_MAIN) $(IMAGE_GEN)
|
||||
@set -e
|
||||
@echo "Generating $(BOOT_VHD)"
|
||||
@$(IMAGE_GEN) -bld_vhd $< $(BOOT_VHD) $(shell basename $(CURDIR))
|
||||
$(Q)$(SET) -e
|
||||
$(ECHO) "Generating $(BOOT_VHD)"
|
||||
$(Q)$(IMAGE_GEN) -bld_vhd $< $(BOOT_VHD) $(shell basename $(CURDIR))
|
||||
|
||||
# Install BOOTROM image to VHDL source directory
|
||||
bootloader: bl_image
|
||||
@set -e
|
||||
@echo "Installing bootloader image to $(NEORV32_RTL_PATH)/core/$(BOOT_VHD)"
|
||||
@cp $(BOOT_VHD) $(NEORV32_RTL_PATH)/core/.
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Check toolchain
|
||||
# -----------------------------------------------------------------------------
|
||||
|
||||
check: $(IMAGE_GEN)
|
||||
@echo "---------------- $(CC) ----------------"
|
||||
@$(CC) -v
|
||||
@echo "---------------- $(OBJDUMP) ----------------"
|
||||
@$(OBJDUMP) -V
|
||||
@echo "---------------- $(OBJCOPY) ----------------"
|
||||
@$(OBJCOPY) -V
|
||||
@echo "---------------- $(READELF) ----------------"
|
||||
@$(READELF) -v
|
||||
@echo "---------------- $(SIZE) ----------------"
|
||||
@$(SIZE) -V
|
||||
@echo "---------------- NEORV32 image_gen ----------------"
|
||||
@$(IMAGE_GEN) -help
|
||||
@echo "---------------- Native GCC ----------------"
|
||||
@$(CC_HOST) -v
|
||||
@echo ""
|
||||
@echo "Toolchain check OK"
|
||||
$(Q)$(SET) -e
|
||||
$(ECHO) "Installing bootloader image to $(NEORV32_RTL_PATH)/core/$(BOOT_VHD)"
|
||||
$(Q)$(CP) $(BOOT_VHD) $(NEORV32_RTL_PATH)/core/.
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# In-console simulation using default testbench and GHDL
|
||||
# -----------------------------------------------------------------------------
|
||||
|
||||
sim: $(APP_VHD)
|
||||
@echo "Simulating processor using default testbench..."
|
||||
@sh $(NEORV32_SIM_PATH)/ghdl.sh $(GHDL_RUN_FLAGS)
|
||||
$(ECHO) "Simulating processor using default testbench..."
|
||||
$(Q)$(SH) $(NEORV32_SIM_PATH)/ghdl.sh $(GHDL_RUN_FLAGS)
|
||||
|
||||
# Install VHDL memory initialization file
|
||||
install-$(APP_VHD): $(APP_VHD)
|
||||
@set -e
|
||||
@echo "Installing application image to $(NEORV32_RTL_PATH)/core/$(APP_VHD)"
|
||||
@cp $(APP_VHD) $(NEORV32_RTL_PATH)/core/.
|
||||
$(Q)$(SET) -e
|
||||
$(ECHO) "Installing application image to $(NEORV32_RTL_PATH)/core/$(APP_VHD)"
|
||||
$(Q)$(CP) $(APP_VHD) $(NEORV32_RTL_PATH)/core/.
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Regenerate HDL file list file(s)
|
||||
# -----------------------------------------------------------------------------
|
||||
|
||||
hdl_lists:
|
||||
@sh $(NEORV32_RTL_PATH)/generate_file_lists.sh
|
||||
$(Q)$(SH) $(NEORV32_RTL_PATH)/generate_file_lists.sh
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Show final ELF details (just for debugging)
|
||||
# -----------------------------------------------------------------------------
|
||||
|
||||
elf_info: $(APP_ELF)
|
||||
@$(OBJDUMP) -x $(APP_ELF)
|
||||
$(Q)$(OBJDUMP) -x $(APP_ELF)
|
||||
|
||||
elf_sections: $(APP_ELF)
|
||||
@$(READELF) -S $(APP_ELF)
|
||||
$(Q)$(READELF) -S $(APP_ELF)
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Run GDB
|
||||
# -----------------------------------------------------------------------------
|
||||
|
||||
gdb: $(APP_ELF)
|
||||
@$(GDB) $(APP_ELF) $(GDB_ARGS)
|
||||
$(Q)$(GDB) $(APP_ELF) $(GDB_ARGS)
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Clean up
|
||||
# -----------------------------------------------------------------------------
|
||||
|
||||
# remove all build artifacts
|
||||
clean:
|
||||
@rm -rf $(BUILD_DIR)
|
||||
@rm -f $(APP_EXE) $(APP_ELF) $(APP_HEX) $(APP_BIN) $(APP_COE) $(APP_MEM) $(APP_MIF) $(APP_ASM) $(APP_VHD) $(BOOT_VHD)
|
||||
@rm -f .gdb_history
|
||||
$(Q)$(RM) -rf $(BUILD_DIR)
|
||||
$(Q)$(RM) -f $(APP_EXE) $(APP_ELF) $(APP_HEX) $(APP_BIN) $(APP_COE) $(APP_MEM) $(APP_MIF) $(APP_ASM) $(APP_VHD) $(BOOT_VHD)
|
||||
$(Q)$(RM) -f .gdb_history
|
||||
|
||||
# also remove image generator
|
||||
clean_all: clean
|
||||
@rm -f $(IMAGE_GEN)
|
||||
@rm -rf $(NEORV32_SIM_PATH)/build
|
||||
$(Q)$(RM) -f $(IMAGE_GEN)
|
||||
$(Q)$(RM) -rf $(NEORV32_SIM_PATH)/build
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Check toolchain
|
||||
# -----------------------------------------------------------------------------
|
||||
|
||||
check: $(IMAGE_GEN)
|
||||
$(ECHO) "---------------- $(CC) ----------------"
|
||||
$(Q)$(CC) -v
|
||||
$(ECHO) "---------------- $(OBJDUMP) ----------------"
|
||||
$(Q)$(OBJDUMP) -V
|
||||
$(ECHO) "---------------- $(OBJCOPY) ----------------"
|
||||
$(Q)$(OBJCOPY) -V
|
||||
$(ECHO) "---------------- $(READELF) ----------------"
|
||||
$(Q)$(READELF) -v
|
||||
$(ECHO) "---------------- $(SIZE) ----------------"
|
||||
$(Q)$(SIZE) -V
|
||||
$(ECHO) "---------------- NEORV32 image_gen ----------------"
|
||||
$(Q)$(IMAGE_GEN) -help
|
||||
$(ECHO) "---------------- Native GCC ----------------"
|
||||
$(Q)$(CC_HOST) -v
|
||||
$(ECHO) ""
|
||||
$(ECHO) "Toolchain check OK"
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Show configuration
|
||||
# -----------------------------------------------------------------------------
|
||||
|
||||
info:
|
||||
@echo "******************************************************"
|
||||
@echo "Project / Makfile Configuration"
|
||||
@echo "******************************************************"
|
||||
@echo "Project folder: $(shell basename $(CURDIR))"
|
||||
@echo "Source files: $(APP_SRC)"
|
||||
@echo "Include folder(s): $(APP_INC)"
|
||||
@echo "ASM include folder(s): $(ASM_INC)"
|
||||
@echo "NEORV32 home folder (NEORV32_HOME): $(NEORV32_HOME)"
|
||||
@echo "IMAGE_GEN: $(IMAGE_GEN)"
|
||||
@echo "Core source files:"
|
||||
@echo "$(CORE_SRC)"
|
||||
@echo "Core include folder:"
|
||||
@echo "$(NEORV32_INC_PATH)"
|
||||
@echo "Search path (VPATH)"
|
||||
@echo "$(VPATH)"
|
||||
@echo "Project object files:"
|
||||
@echo "$(OBJ)"
|
||||
@echo "LIBGCC:"
|
||||
@$(CC) -print-libgcc-file-name
|
||||
@echo "SEARCH-DIRS:"
|
||||
@$(CC) -print-search-dirs
|
||||
@echo "USER_LIBS: $(USER_LIBS)"
|
||||
@echo "LD_LIBS: $(LD_LIBS)"
|
||||
@echo "MARCH: $(MARCH)"
|
||||
@echo "MABI: $(MABI)"
|
||||
@echo "CC: $(CC)"
|
||||
@echo "OBJDUMP: $(OBJDUMP)"
|
||||
@echo "OBJCOPY: $(OBJCOPY)"
|
||||
@echo "SIZE: $(SIZE)"
|
||||
@echo "DEBUGGER: $(GDB)"
|
||||
@echo "GDB_ARGS: $(GDB_ARGS)"
|
||||
@echo "GHDL_RUN_FLAGS: $(GHDL_RUN_FLAGS)"
|
||||
@echo "USER_FLAGS: $(USER_FLAGS)"
|
||||
@echo "CC_OPTS: $(CC_OPTS)"
|
||||
$(ECHO) "******************************************************"
|
||||
$(ECHO) "Project / Makefile Configuration"
|
||||
$(ECHO) "******************************************************"
|
||||
$(ECHO) "Git tag: $(NEORV32_GIT_TAG)"
|
||||
$(ECHO) "Project folder: $(shell basename $(CURDIR))"
|
||||
$(ECHO) "Source files: $(APP_SRC)"
|
||||
$(ECHO) "Include folder(s): $(APP_INC)"
|
||||
$(ECHO) "ASM include folder(s): $(ASM_INC)"
|
||||
$(ECHO) "NEORV32 home folder (NEORV32_HOME): $(NEORV32_HOME)"
|
||||
$(ECHO) "IMAGE_GEN: $(IMAGE_GEN)"
|
||||
$(ECHO) "Core source files:"
|
||||
$(ECHO) "$(CORE_SRC)"
|
||||
$(ECHO) "Core include folder:"
|
||||
$(ECHO) "$(NEORV32_INC_PATH)"
|
||||
$(ECHO) "Search path (VPATH)"
|
||||
$(ECHO) "$(VPATH)"
|
||||
$(ECHO) "Project object files:"
|
||||
$(ECHO) "$(OBJ)"
|
||||
$(ECHO) "LIBGCC:"
|
||||
$(Q)$(CC) -print-libgcc-file-name
|
||||
$(ECHO) "SEARCH-DIRS:"
|
||||
$(Q)$(CC) -print-search-dirs
|
||||
$(ECHO) "USER_LIBS: $(USER_LIBS)"
|
||||
$(ECHO) "LD_LIBS: $(LD_LIBS)"
|
||||
$(ECHO) "MARCH: $(MARCH)"
|
||||
$(ECHO) "MABI: $(MABI)"
|
||||
$(ECHO) "CC: $(CC)"
|
||||
$(ECHO) "OBJDUMP: $(OBJDUMP)"
|
||||
$(ECHO) "OBJCOPY: $(OBJCOPY)"
|
||||
$(ECHO) "SIZE: $(SIZE)"
|
||||
$(ECHO) "DEBUGGER: $(GDB)"
|
||||
$(ECHO) "GDB_ARGS: $(GDB_ARGS)"
|
||||
$(ECHO) "GHDL_RUN_FLAGS: $(GHDL_RUN_FLAGS)"
|
||||
$(ECHO) "USER_FLAGS: $(USER_FLAGS)"
|
||||
$(ECHO) "CC_FLAGS: $(CC_FLAGS)"
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Help
|
||||
# -----------------------------------------------------------------------------
|
||||
|
||||
help:
|
||||
@echo "NEORV32 Software Makefile"
|
||||
@echo "Find more information at https://github.com/stnolting/neorv32"
|
||||
@echo ""
|
||||
@echo "Targets:"
|
||||
@echo ""
|
||||
@echo " help - show this text"
|
||||
@echo " check - check toolchain"
|
||||
@echo " info - show makefile/toolchain configuration"
|
||||
@echo " gdb - start GNU debugging session"
|
||||
@echo " asm - compile and generate <$(APP_ASM)> assembly listing file for manual debugging"
|
||||
@echo " elf - compile and generate <$(APP_ELF)> ELF file"
|
||||
@echo " exe - compile and generate <$(APP_EXE)> executable image file for bootloader upload (includes a HEADER!)"
|
||||
@echo " bin - compile and generate <$(APP_BIN)> executable memory image"
|
||||
@echo " hex - compile and generate <$(APP_HEX)> executable memory image"
|
||||
@echo " coe - compile and generate <$(APP_COE)> executable memory image"
|
||||
@echo " mem - compile and generate <$(APP_MEM)> executable memory image"
|
||||
@echo " mif - compile and generate <$(APP_MIF)> executable memory image"
|
||||
@echo " image - compile and generate VHDL IMEM application boot image <$(APP_VHD)> in local folder"
|
||||
@echo " install - compile, generate and install VHDL IMEM application boot image <$(APP_VHD)>"
|
||||
@echo " sim - in-console simulation using default testbench (sim folder) and GHDL"
|
||||
@echo " hdl_lists - regenerate HDL file-lists (*.f) in NEORV32_HOME/rtl"
|
||||
@echo " all - exe + install + hex + bin + asm"
|
||||
@echo " elf_info - show ELF layout info"
|
||||
@echo " elf_sections - show ELF sections"
|
||||
@echo " clean - clean up project home folder"
|
||||
@echo " clean_all - clean up project home folder and image generator"
|
||||
@echo " bl_image - compile and generate VHDL BOOTROM bootloader boot image <$(BOOT_VHD)> in local folder"
|
||||
@echo " bootloader - compile, generate and install VHDL BOOTROM bootloader boot image <$(BOOT_VHD)>"
|
||||
@echo ""
|
||||
@echo "Variables:"
|
||||
@echo ""
|
||||
@echo " USER_FLAGS - Custom toolchain flags [append only]: \"$(USER_FLAGS)\""
|
||||
@echo " USER_LIBS - Custom libraries [append only]: \"$(USER_LIBS)\""
|
||||
@echo " EFFORT - Optimization level: \"$(EFFORT)\""
|
||||
@echo " MARCH - Machine architecture: \"$(MARCH)\""
|
||||
@echo " MABI - Machine binary interface: \"$(MABI)\""
|
||||
@echo " APP_INC - C include folder(s) [append only]: \"$(APP_INC)\""
|
||||
@echo " APP_SRC - C source folder(s) [append only]: \"$(APP_SRC)\""
|
||||
@echo " ASM_INC - ASM include folder(s) [append only]: \"$(ASM_INC)\""
|
||||
@echo " RISCV_PREFIX - Toolchain prefix: \"$(RISCV_PREFIX)\""
|
||||
@echo " NEORV32_HOME - NEORV32 home folder: \"$(NEORV32_HOME)\""
|
||||
@echo " GDB_ARGS - GDB (connection) arguments: \"$(GDB_ARGS)\""
|
||||
@echo " GHDL_RUN_FLAGS - GHDL simulation run arguments: \"$(GHDL_RUN_FLAGS)\""
|
||||
@echo ""
|
||||
$(ECHO) "NEORV32 Software Makefile"
|
||||
$(ECHO) "Find more information at https://github.com/stnolting/neorv32"
|
||||
$(ECHO) "Use make V=1 or set BUILD_VERBOSE to increase build verbosity"
|
||||
$(ECHO) ""
|
||||
$(ECHO) "Targets:"
|
||||
$(ECHO) ""
|
||||
$(ECHO) " help show this text"
|
||||
$(ECHO) " check check toolchain"
|
||||
$(ECHO) " info show makefile/toolchain configuration"
|
||||
$(ECHO) " gdb start GNU debugging session"
|
||||
$(ECHO) " asm compile and generate <$(APP_ASM)> assembly listing file for manual debugging"
|
||||
$(ECHO) " elf compile and generate <$(APP_ELF)> ELF file"
|
||||
$(ECHO) " exe compile and generate <$(APP_EXE)> executable image file for bootloader upload (includes a HEADER!)"
|
||||
$(ECHO) " bin compile and generate <$(APP_BIN)> executable memory image"
|
||||
$(ECHO) " hex compile and generate <$(APP_HEX)> executable memory image"
|
||||
$(ECHO) " coe compile and generate <$(APP_COE)> executable memory image"
|
||||
$(ECHO) " mem compile and generate <$(APP_MEM)> executable memory image"
|
||||
$(ECHO) " mif compile and generate <$(APP_MIF)> executable memory image"
|
||||
$(ECHO) " image compile and generate VHDL IMEM application boot image <$(APP_VHD)> in local folder"
|
||||
$(ECHO) " install compile, generate and install VHDL IMEM application boot image <$(APP_VHD)>"
|
||||
$(ECHO) " sim in-console simulation using default testbench (sim folder) and GHDL"
|
||||
$(ECHO) " hdl_lists regenerate HDL file-lists (*.f) in NEORV32_HOME/rtl"
|
||||
$(ECHO) " all exe + install + hex + bin + asm"
|
||||
$(ECHO) " elf_info show ELF layout info"
|
||||
$(ECHO) " elf_sections show ELF sections"
|
||||
$(ECHO) " clean clean up project home folder"
|
||||
$(ECHO) " clean_all clean up project home folder and image generator"
|
||||
$(ECHO) " bl_image compile and generate VHDL BOOTROM bootloader boot image <$(BOOT_VHD)> in local folder"
|
||||
$(ECHO) " bootloader compile, generate and install VHDL BOOTROM bootloader boot image <$(BOOT_VHD)>"
|
||||
$(ECHO) ""
|
||||
$(ECHO) "Variables:"
|
||||
$(ECHO) ""
|
||||
$(ECHO) " BUILD_VERBOSE Set to increase build verbosity: \"$(BUILD_VERBOSE)\""
|
||||
$(ECHO) " USER_FLAGS Custom toolchain flags [append only]: \"$(USER_FLAGS)\""
|
||||
$(ECHO) " USER_LIBS Custom libraries [append only]: \"$(USER_LIBS)\""
|
||||
$(ECHO) " EFFORT Optimization level: \"$(EFFORT)\""
|
||||
$(ECHO) " MARCH Machine architecture: \"$(MARCH)\""
|
||||
$(ECHO) " MABI Machine binary interface: \"$(MABI)\""
|
||||
$(ECHO) " APP_INC C include folder(s) [append only]: \"$(APP_INC)\""
|
||||
$(ECHO) " APP_SRC C source folder(s) [append only]: \"$(APP_SRC)\""
|
||||
$(ECHO) " APP_OBJ Object file(s) [append only]: \"$(APP_OBJ)\""
|
||||
$(ECHO) " ASM_INC ASM include folder(s) [append only]: \"$(ASM_INC)\""
|
||||
$(ECHO) " RISCV_PREFIX Toolchain prefix: \"$(RISCV_PREFIX)\""
|
||||
$(ECHO) " NEORV32_HOME NEORV32 home folder: \"$(NEORV32_HOME)\""
|
||||
$(ECHO) " GDB_ARGS GDB (connection) arguments: \"$(GDB_ARGS)\""
|
||||
$(ECHO) " GHDL_RUN_FLAGS GHDL simulation run arguments: \"$(GHDL_RUN_FLAGS)\""
|
||||
$(ECHO) ""
|
||||
|
|
|
|||
1
sw/example/eclipse/.gitignore
vendored
Normal file
1
sw/example/eclipse/.gitignore
vendored
Normal file
|
|
@ -0,0 +1 @@
|
|||
.settings/
|
||||
|
|
@ -1,15 +0,0 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project>
|
||||
<configuration id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.base.2100625147" name="Default">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
|
||||
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="492677979462914387" id="org.eclipse.embedcdt.managedbuild.cross.riscv.core.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
</extension>
|
||||
</configuration>
|
||||
</project>
|
||||
|
|
@ -1,15 +0,0 @@
|
|||
eclipse.preferences.version=1
|
||||
indexer/indexAllFiles=true
|
||||
indexer/indexAllHeaderVersions=true
|
||||
indexer/indexAllVersionsSpecificHeaders=
|
||||
indexer/indexOnOpen=true
|
||||
indexer/indexUnusedHeadersWithAlternateLang=true
|
||||
indexer/indexUnusedHeadersWithDefaultLang=true
|
||||
indexer/indexerId=org.eclipse.cdt.core.fastIndexer
|
||||
indexer/skipFilesLargerThanMB=8
|
||||
indexer/skipImplicitReferences=false
|
||||
indexer/skipIncludedFilesLargerThanMB=16
|
||||
indexer/skipMacroReferences=false
|
||||
indexer/skipReferences=false
|
||||
indexer/skipTypeReferences=false
|
||||
indexer/useHeuristicIncludeResolution=true
|
||||
|
|
@ -1,2 +0,0 @@
|
|||
eclipse.preferences.version=1
|
||||
encoding/<project>=UTF-8
|
||||
|
|
@ -1,3 +0,0 @@
|
|||
eclipse.preferences.version=1
|
||||
executable.name=openocd.exe
|
||||
install.folder=C\:\\xpack\\xpack-openocd-0.12.0-4\\bin
|
||||
|
|
@ -1,2 +0,0 @@
|
|||
buildTools.path=C\:\\xpack\\xpack-windows-build-tools-4.4.1-3\\bin
|
||||
eclipse.preferences.version=1
|
||||
|
|
@ -1,2 +0,0 @@
|
|||
eclipse.preferences.version=1
|
||||
toolchain.path.2273142913=C\:\\xpack\\xpack-riscv-none-elf-gcc-14.2.0-2\\bin
|
||||
|
|
@ -4,33 +4,27 @@
|
|||
// UART baud rate
|
||||
#define BAUD_RATE 19200
|
||||
|
||||
// Setup the processor
|
||||
void platform_init(void) {
|
||||
neorv32_rte_setup();
|
||||
neorv32_uart_setup(NEORV32_UART0, BAUD_RATE, 0);
|
||||
}
|
||||
|
||||
// Simple bus-wait helper
|
||||
// Simple busy-wait delay function
|
||||
void delay_ms(uint32_t time_ms) {
|
||||
neorv32_aux_delay_ms(neorv32_sysinfo_get_clk(), time_ms);
|
||||
}
|
||||
|
||||
|
||||
// Main function
|
||||
int main() {
|
||||
|
||||
// setup NEORV32 runtime environment
|
||||
neorv32_rte_setup();
|
||||
|
||||
// setup UART0 at default baud rate, no interrupts
|
||||
neorv32_uart_setup(NEORV32_UART0, BAUD_RATE, 0);
|
||||
|
||||
// clear GPIO output (set all bits to 0)
|
||||
neorv32_gpio_port_set(0);
|
||||
// initialize the platform
|
||||
platform_init();
|
||||
|
||||
// say hello
|
||||
printf("Hello Eclipse!\n"); // stdio's printf uses UART0
|
||||
|
||||
int cnt = 0;
|
||||
while (1) {
|
||||
cnt = (cnt + 1) & 0xff; // increment counter and mask for lowest 8 bit
|
||||
neorv32_gpio_port_set(cnt); // output via GPIO.out
|
||||
delay_ms(250); // wait 250ms using busy wait
|
||||
while(1) {
|
||||
printf("Hello Eclipse!\n");
|
||||
delay_ms(500);
|
||||
}
|
||||
|
||||
// this should never be reached
|
||||
|
|
|
|||
|
|
@ -174,6 +174,7 @@ int main() {
|
|||
// -----------------------------------------------
|
||||
neorv32_aux_print_logo(); // show NEORV32 ASCII logo
|
||||
neorv32_aux_print_about(); // show project credits
|
||||
PRINT_STANDARD("Build: %s "__DATE__" "__TIME__"\n", NEORV32_GIT_TAG);
|
||||
neorv32_aux_print_hw_config(); // show full hardware configuration report
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -23,7 +23,6 @@ extern "C" {
|
|||
#include <inttypes.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
|
||||
/**********************************************************************//**
|
||||
* @name IO Address Space Map - Peripheral/IO Devices
|
||||
**************************************************************************/
|
||||
|
|
@ -174,6 +173,16 @@ extern "C" {
|
|||
/**@}*/
|
||||
|
||||
|
||||
/**********************************************************************//**
|
||||
* @name NEORV32 Makefile symbols
|
||||
**************************************************************************/
|
||||
/**@{*/
|
||||
#ifndef NEORV32_GIT_TAG
|
||||
#define NEORV32_GIT_TAG "unknown"
|
||||
#endif
|
||||
/**@}*/
|
||||
|
||||
|
||||
/**********************************************************************//**
|
||||
* @name NEORV32 linker symbols
|
||||
**************************************************************************/
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
#ifndef NEORV32_PWM_H
|
||||
#define NEORV32_PWM_H
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
|
|
@ -36,6 +37,7 @@ enum CHANNEL_CFG_enum {
|
|||
PWM_CFG_CDIV_LSB = 8, /**< PWM configuration register(8) (r/w): Clock divider (10-bit), LSB */
|
||||
PWM_CFG_CDIV_MSB = 17, /**< PWM configuration register(17) (r/w): Clock divider (10-bit), MSB */
|
||||
|
||||
PWM_CFG_POL = 27, /**< PWM configuration register(27) (r/w): Channel polarity, inverted when set */
|
||||
PWM_CFG_PRSC_LSB = 28, /**< PWM configuration register(28) (r/w): Clock prescaler select (3-bit), LSB */
|
||||
PWM_CFG_PRSC_MSB = 30, /**< PWM configuration register(30) (r/w): Clock prescaler select (3-bit), MSB */
|
||||
PWM_CFG_EN = 31 /**< PWM configuration register(31) (r/w): channel enable */
|
||||
|
|
@ -51,6 +53,7 @@ int neorv32_pwm_available(void);
|
|||
int neorv32_pmw_get_num_channels(void);
|
||||
void neorv32_pwm_ch_enable(int channel);
|
||||
void neorv32_pwm_ch_disable(int channel);
|
||||
void neorv32_pwm_ch_set_polarity(int channel, bool inverted);
|
||||
void neorv32_pwm_ch_set_clock(int channel, int prsc, int cdiv);
|
||||
void neorv32_pwm_ch_set_duty(int channel, int duty);
|
||||
/**@}*/
|
||||
|
|
|
|||
|
|
@ -80,6 +80,24 @@ void neorv32_pwm_ch_disable(int channel) {
|
|||
}
|
||||
|
||||
|
||||
/**********************************************************************//**
|
||||
* Set PWM channel's polarity configuration.
|
||||
*
|
||||
* @param[in] channel Channel select (0..15).
|
||||
* @param[in] normal polarity if false (default), inverted polarity if true
|
||||
**************************************************************************/
|
||||
void neorv32_pwm_ch_set_polarity(int channel, bool inverted) {
|
||||
|
||||
channel &= 0xf; // constrain range
|
||||
|
||||
if (inverted) {
|
||||
NEORV32_PWM->CHANNEL_CFG[channel] |= ((uint32_t)(1 << PWM_CFG_POL));
|
||||
} else {
|
||||
NEORV32_PWM->CHANNEL_CFG[channel] &= ~((uint32_t)(1 << PWM_CFG_POL));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**********************************************************************//**
|
||||
* Set PWM channel's clock configuration.
|
||||
*
|
||||
|
|
@ -92,7 +110,7 @@ void neorv32_pwm_ch_set_clock(int channel, int prsc, int cdiv) {
|
|||
channel &= 0xf; // constrain range
|
||||
|
||||
uint32_t tmp = NEORV32_PWM->CHANNEL_CFG[channel];
|
||||
tmp &= 0x800000ffU; // clear current prsc and cdiv, keep enable and duty
|
||||
tmp &= 0x880000ffU; // clear current prsc and cdiv, keep enable, polarity, and duty
|
||||
tmp |= ((uint32_t)(prsc & 0x7U)) << PWM_CFG_PRSC_LSB;
|
||||
tmp |= ((uint32_t)(cdiv & 0x3ffU)) << PWM_CFG_CDIV_LSB;
|
||||
NEORV32_PWM->CHANNEL_CFG[channel] = tmp;
|
||||
|
|
|
|||
|
|
@ -6,5 +6,5 @@ adapter driver ftdi
|
|||
ftdi vid_pid 0x0403 0x6010
|
||||
ftdi channel 0
|
||||
ftdi layout_init 0x0038 0x003b
|
||||
adapter speed 4000
|
||||
adapter speed 8000
|
||||
transport select jtag
|
||||
|
|
|
|||
|
|
@ -528,43 +528,118 @@
|
|||
|
||||
<addressBlock>
|
||||
<offset>0</offset>
|
||||
<size>0x10</size>
|
||||
<size>0x40</size>
|
||||
<usage>registers</usage>
|
||||
</addressBlock>
|
||||
|
||||
<registers>
|
||||
<register>
|
||||
<name>CTRL</name>
|
||||
<description>Control register</description>
|
||||
<name>CHANNEL_CFG[0]</name>
|
||||
<description>Channel 0 configuration register</description>
|
||||
<addressOffset>0x00</addressOffset>
|
||||
<fields>
|
||||
<field>
|
||||
<name>PWM_CTRL_EN</name>
|
||||
<bitRange>[0:0]</bitRange>
|
||||
<description>PWM controller enable flag</description>
|
||||
<name>PWM_CFG_DUTY</name>
|
||||
<bitRange>[7:0]</bitRange>
|
||||
<description>Duty cycle</description>
|
||||
</field>
|
||||
<field>
|
||||
<name>PWM_CTRL_PRSCx</name>
|
||||
<bitRange>[3:1]</bitRange>
|
||||
<name>PWM_CFG_CDIV</name>
|
||||
<bitRange>[17:8]</bitRange>
|
||||
<description>Clock divider</description>
|
||||
</field>
|
||||
<field>
|
||||
<name>PWM_CFG_POL</name>
|
||||
<bitRange>[27:27]</bitRange>
|
||||
<description>Channel polarity, inverted when set</description>
|
||||
</field>
|
||||
<field>
|
||||
<name>PWM_CFG_PRSC</name>
|
||||
<bitRange>[30:28]</bitRange>
|
||||
<description>Clock prescaler select</description>
|
||||
</field>
|
||||
<field>
|
||||
<name>PWM_CFG_EN</name>
|
||||
<bitRange>[31:31]</bitRange>
|
||||
<description>Channel enable</description>
|
||||
</field>
|
||||
</fields>
|
||||
</register>
|
||||
<register>
|
||||
<name>DC[0]</name>
|
||||
<description>Duty cycle register 0</description>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[1]</name>
|
||||
<description>Channel 1 configuration register</description>
|
||||
<addressOffset>0x04</addressOffset>
|
||||
</register>
|
||||
<register>
|
||||
<name>DC[1]</name>
|
||||
<description>Duty cycle register 1</description>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[2]</name>
|
||||
<description>Channel 2 configuration register</description>
|
||||
<addressOffset>0x08</addressOffset>
|
||||
</register>
|
||||
<register>
|
||||
<name>DC[2]</name>
|
||||
<description>Duty cycle register 2</description>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[3]</name>
|
||||
<description>Channel 3 configuration register</description>
|
||||
<addressOffset>0x0C</addressOffset>
|
||||
</register>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[4]</name>
|
||||
<description>Channel 4 configuration register</description>
|
||||
<addressOffset>0x10</addressOffset>
|
||||
</register>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[5]</name>
|
||||
<description>Channel 5 configuration register</description>
|
||||
<addressOffset>0x14</addressOffset>
|
||||
</register>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[6]</name>
|
||||
<description>Channel 6 configuration register</description>
|
||||
<addressOffset>0x18</addressOffset>
|
||||
</register>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[7]</name>
|
||||
<description>Channel 7 configuration register</description>
|
||||
<addressOffset>0x1C</addressOffset>
|
||||
</register>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[8]</name>
|
||||
<description>Channel 8 configuration register</description>
|
||||
<addressOffset>0x20</addressOffset>
|
||||
</register>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[9]</name>
|
||||
<description>Channel 9 configuration register</description>
|
||||
<addressOffset>0x24</addressOffset>
|
||||
</register>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[10]</name>
|
||||
<description>Channel 10 configuration register</description>
|
||||
<addressOffset>0x28</addressOffset>
|
||||
</register>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[11]</name>
|
||||
<description>Channel 11 configuration register</description>
|
||||
<addressOffset>0x2C</addressOffset>
|
||||
</register>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[12]</name>
|
||||
<description>Channel 12 configuration register</description>
|
||||
<addressOffset>0x30</addressOffset>
|
||||
</register>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[13]</name>
|
||||
<description>Channel 13 configuration register</description>
|
||||
<addressOffset>0x34</addressOffset>
|
||||
</register>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[14]</name>
|
||||
<description>Channel 14 configuration register</description>
|
||||
<addressOffset>0x38</addressOffset>
|
||||
</register>
|
||||
<register derivedFrom="CHANNEL_CFG[0]">
|
||||
<name>CHANNEL_CFG[15]</name>
|
||||
<description>Channel 15 configuration register</description>
|
||||
<addressOffset>0x3C</addressOffset>
|
||||
</register>
|
||||
</registers>
|
||||
</peripheral>
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue