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stnolting 2022-03-14 07:36:26 +01:00
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docs/attrs.adoc
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@ -1,5 +1,3 @@
:author: Dipl.-Ing. Stephan Nolting
:email: stnolting@gmail.com
:keywords: neorv32, risc-v, riscv, fpga, soft-core, vhdl, microcontroller, cpu, soc, processor, gcc, openocd, gdb
:description: A size-optimized, customizable and open-source full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.
:revnumber: v1.6.9

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docs/impressum.md
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Dipl.-Ing. Stephan Nolting
Hannover, Germany
Deutschland
E-Mail: [stnolting@gmail.com](mailto:stnolting@gmail.com)

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docs/legal.adoc
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@ -36,8 +36,7 @@ ARISING IN ANY WAY OUT OF
**The NEORV32 RISC-V Processor** +
Copyright (c) 2022, by Dipl.-Ing. Stephan Nolting. All rights reserved. +
HQ: https://github.com/stnolting/neorv32 +
Contact: stnolting@gmail.com +
_made in Hanover, Germany_
Contact: stnolting@gmail.com
==========================
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