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🧪 Use xpack risc-v gcc as default prebuilt toolchain (#1091)
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commit
457f902d11
9 changed files with 59 additions and 102 deletions
17
.github/workflows/Processor.yml
vendored
17
.github/workflows/Processor.yml
vendored
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@ -32,30 +32,31 @@ jobs:
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- name: '🧰 Repository Checkout'
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uses: actions/checkout@v4
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- name: '📦 Install RISC-V GCC'
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- name: '📦 Install xPack RISC-V GCC'
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run: |
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wget -q https://github.com/stnolting/riscv-gcc-prebuilt/releases/download/rv32i-131023/riscv32-unknown-elf.gcc-13.2.0.tar.gz
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wget -q https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v14.2.0-2/xpack-riscv-none-elf-gcc-14.2.0-2-linux-x64.tar.gz
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mkdir $GITHUB_WORKSPACE/riscv-gcc
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tar -xzf riscv32-unknown-elf.gcc-13.2.0.tar.gz -C $GITHUB_WORKSPACE/riscv-gcc
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echo $GITHUB_WORKSPACE/riscv-gcc/bin >> $GITHUB_PATH
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tar -xzf xpack-riscv-none-elf-gcc-14.2.0-2-linux-x64.tar.gz -C $GITHUB_WORKSPACE/riscv-gcc
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echo $GITHUB_WORKSPACE/riscv-gcc/xpack-riscv-none-elf-gcc-14.2.0-2/bin >> $GITHUB_PATH
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- name: '📦 Install GHDL'
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uses: ghdl/setup-ghdl-ci@nightly
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- name: '🔍 Check tools'
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run: |
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riscv32-unknown-elf-gcc -v
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riscv-none-elf-gcc -v
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ghdl -v
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- name: '⚙️ Build Software Framework Tests'
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run: |
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make -C sw/example/processor_check check
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make -C sw/example clean_all exe
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make -C sw/bootloader clean_all info bootloader
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make RISCV_PREFIX=riscv-none-elf- -C sw/example/processor_check check
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make RISCV_PREFIX=riscv-none-elf- -C sw/example clean_all exe
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make RISCV_PREFIX=riscv-none-elf- -C sw/bootloader clean_all info bootloader
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- name: '🚧 Compile executable and run simulation'
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run: |
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make -C sw/example/${{ matrix.example }} \
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RISCV_PREFIX=riscv-none-elf- \
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USER_FLAGS+="-DUART0_SIM_MODE -DUART1_SIM_MODE" \
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clean_all \
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info \
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@ -29,6 +29,7 @@ mimpid = 0x01040312 -> Version 01.04.03.12 -> v1.4.3.12
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| Date | Version | Comment | Ticket |
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|:----:|:-------:|:--------|:------:|
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| 10.11.2024 | 1.10.6.5 | :warning: switch to [xPack](https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack) as default prebuilt RISC-V GCC toolchain (now using `riscv-none-elf-` as default gcc prefix) | [#1091](https://github.com/stnolting/neorv32/pull/1091) |
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| 10.11.2024 | 1.10.6.4 | rework default processor testbench | [#1093](https://github.com/stnolting/neorv32/pull/1093) |
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| 06.11.2024 | 1.10.6.3 | minor rtl edits and cleanups | [#1090](https://github.com/stnolting/neorv32/pull/1090) |
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| 02.11.2024 | 1.10.6.2 | :warning: rework processor boot configuration; add new boot-configuration generics | [#1086](https://github.com/stnolting/neorv32/pull/1086) |
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@ -220,7 +220,7 @@ Variables:
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APP_INC - C include folder(s) [append only]: "-I ."
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APP_SRC - C source folder(s) [append only]: "./main.c "
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ASM_INC - ASM include folder(s) [append only]: "-I ."
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RISCV_PREFIX - Toolchain prefix: "riscv32-unknown-elf-"
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RISCV_PREFIX - Toolchain prefix: "riscv-none-elf-"
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NEORV32_HOME - NEORV32 home folder: "../../.."
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GDB_ARGS - GDB (connection) arguments: "-ex target extended-remote localhost:3333"
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GHDL_RUN_FLAGS - GHDL simulation run arguments: ""
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@ -2,85 +2,71 @@
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:sectnums:
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== Software Toolchain Setup
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To compile (and debug) executables for the NEORV32 a RISC-V toolchain is required.
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There are two possibilities to get this:
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To compile (and debug) executables for the NEORV32 a RISC-V-compatible toolchain is required.
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By default, the project's software framework uses the GNU C Compiler RISC-V port "RISC-V GCC".
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Basically, there are two options to obtain such a toolchain:
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1. Download and _build_ the official RISC-V GNU toolchain yourself.
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2. Download and install a prebuilt version of the toolchain; this might also done via the package manager / app store of your OS
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1. Download and _build_ the RISC-V GNU toolchain by yourself.
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2. Download and _install_ a **prebuilt** version of the toolchain.
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.Default GCC Prefix
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[NOTE]
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The default toolchain prefix (`RISCV_PREFIX` variable) for this project is **`riscv32-unknown-elf-`**. Of course you can use any other RISC-V
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toolchain (like `riscv64-unknown-elf-`) that is capable to emit code for a `rv32` architecture. Just change `RISCV_PREFIX`
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according to your needs.
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The default toolchain prefix for this project is **`riscv-none-elf-`** (`RISCV_PREFIX` variable).
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:sectnums:
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=== Building the Toolchain from Scratch
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**Toolchain Requirements**
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To build the toolchain by yourself you can follow the guide from the official https://github.com/riscv-collab/riscv-gnu-toolchain GitHub page.
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You need to make sure the generated toolchain fits the architecture of the NEORV32 core. To get a toolchain that even supports minimal
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ISA extension configurations, it is recommend to compile for `rv32i` only. Please note that this minimal ISA also provides further ISA
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extensions like `m` or `c`. Of course you can use a _multilib_ approach to generate toolchains for several target ISAs at once.
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[start=1]
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.The toolchain must be able to emit code for a 32-bit architecture (i.e. `mabi=rv32`).
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.A "bare metal" / stand-alone C standard library should be used (i.e. the no-Linux version; for example "Newlib").
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.Preparing GCC build for `rv32i` (minimal ISA)
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.Library/ISA Considerations
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[IMPORTANT]
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Note that a toolchain build with `--with-arch=rv32imc` provides library code (like the C standard library)
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compiled entirely using compressed (`C`) and `mul`/`div` instructions (`M`). Hence, this pre-compiled library
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code CANNOT be executed (without emulation) on an architecture that does not support these ISA extensions.
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**Building the Toolchain from Scratch**
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The official RISC-V GCC GitHub repository (https://github.com/riscv-collab/riscv-gnu-toolchain) provides instructions
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for building the toolchain from scratch:
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.Preparing GCC build for `rv32i` (minimal ISA only in this example)
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[source,bash]
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----
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$ git clone https://github.com/riscv/riscv-gnu-toolchain
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$ cd riscv-gnu-toolchain
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$ riscv-gnu-toolchain$ ./configure --prefix=/opt/riscv --with-arch=rv32i --with-abi=ilp32
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$ riscv-gnu-toolchain$ make
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----
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[IMPORTANT]
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Keep in mind that - for instance - a toolchain build with `--with-arch=rv32imc` provides library code (like the C
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standard library) compiled entirely utilizing compressed (`C`) and `mul`/`div` instructions (`M`). Hence, this
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code CANNOT be executed (without emulation) on an architecture that does not support these ISA extensions.
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**Downloading and Installing a Prebuilt Toolchain**
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Alternatively, a prebuilt toolchain can be used. Some OS package managers provide embedded RISC-V GCC toolchain.
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However, I can highly recommend the toolchain provided by the X-Pack project (MIT license):
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https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
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:sectnums:
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=== Downloading and Installing a Prebuilt Toolchain
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**Toolchain Installation**
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Alternatively, you can download a prebuilt toolchain.
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:sectnums:
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==== Use The Pre-Built Toolchains
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We have compiled several GCC toolchains on a 64-bit x86 Ubuntu (Ubuntu on Windows, actually) and uploaded it to
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GitHub. You can directly download the according toolchain archive as single _zip-file_ within a packed
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release from https://github.com/stnolting/riscv-gcc-prebuilt. More information about downloading and installing
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these prebuilt toolchains can be found in the repository's README.
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:sectnums:
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==== Use a Third Party Toolchain
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Of course you can also use any other prebuilt version of the toolchain. There are a lot RISC-V GCC packages out there -
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even for Windows. On Linux system you might even be able to fetch a toolchain via your distribution's package manager.
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[IMPORTANT]
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Make sure the toolchain can (also) emit code for a `rv32i` architecture, uses the `ilp32` or `ilp32e` ABI and **was not build** using
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CPU extensions that are not supported by the NEORV32 (like `D`).
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:sectnums:
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=== Installation
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Now you have the toolchain binaries. The last step is to add them to your `PATH` environment variable (if you have not
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already done so): make sure to add the _binaries_ folder (`bin`) of your toolchain.
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To integrate the toolchain of choice into the NEORV32 software framework, the toolchain's binaries need
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to be added to the system path (e.g. `PATH` environment variable) so they can be used by a shell. Therefore,
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the absolute path to the toolchain's `bin` folder has to be appended to the `PATH` variable:
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[source,bash]
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----
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$ export PATH=$PATH:/opt/riscv/bin
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----
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You should add this command to your `.bashrc` (if you are using bash) to automatically add the RISC-V
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.bashrc
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[TIP]
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This command can be added to `.bashrc` (or similar) to automatically add the RISC-V
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toolchain at every console start.
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:sectnums:
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=== Testing the Installation
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To make sure everything works fine, navigate to an example project in the NEORV32 example folder and
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To make sure everything works fine, navigate to an example project in the NEORV32 `sw/example` folder and
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execute the following command:
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[source,bash]
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@ -89,4 +75,4 @@ neorv32/sw/example/demo_blink_led$ make check
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----
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This will test all the tools required for generating NEORV32 executables.
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Everything is working fine if `Toolchain check OK` appears at the end.
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Everything is working fine if "Toolchain check OK" appears at the end of the log output.
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@ -29,7 +29,7 @@ package neorv32_package is
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-- Architecture Constants -----------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01100604"; -- hardware version
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01100605"; -- hardware version
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constant archid_c : natural := 19; -- official RISC-V architecture ID
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constant XLEN : natural := 32; -- native data path width
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@ -25,8 +25,8 @@ ASM_INC ?= -I .
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# Optimization
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EFFORT ?= -Os
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# Compiler toolchain
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RISCV_PREFIX ?= riscv32-unknown-elf-
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# Compiler toolchain prefix
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RISCV_PREFIX ?= riscv-none-elf-
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# CPU architecture and ABI
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MARCH ?= rv32i_zicsr_zifencei
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@ -1,7 +1,9 @@
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## Dhrystone Benchmark
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**:warning: The Dhrystone port is outdated. Have a look at the CoreMark port for benchmarking.**
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:copyright: Original sources from [https://github.com/sifive/benchmark-dhrystone](https://github.com/sifive/benchmark-dhrystone);
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see `LICENSE` file. The origianl source code has been modified for the NEORV32 RISC-V Processor.
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see `LICENSE` file. The original source code has been modified for the NEORV32 RISC-V Processor.
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To compile the `main.exe` executable:
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@ -54,12 +54,10 @@
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#define __USE_GNU
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#include <fenv.h>
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//#pragma STDC FENV_ACCESS ON
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#define _GNU_SOURCE
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#include <float.h>
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#include <fenv.h>
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#include <math.h>
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@ -130,37 +128,6 @@ uint32_t get_hw_exceptions(void) {
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}
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/**********************************************************************//**
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* Get exception flags from C runtime (floating-point emulation).
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*
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* @warning WORK-IN-PROGRESS!
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*
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* @return Floating point exception status word.
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**************************************************************************/
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uint32_t get_sw_exceptions(void) {
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const uint32_t FP_EXC_NV_C = 1 << 0; // invalid operation
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const uint32_t FP_EXC_DZ_C = 1 << 1; // divide by zero
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const uint32_t FP_EXC_OF_C = 1 << 2; // overflow
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const uint32_t FP_EXC_UF_C = 1 << 3; // underflow
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const uint32_t FP_EXC_NX_C = 1 << 4; // inexact
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int fpeRaised = fetestexcept(FE_ALL_EXCEPT);
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uint32_t res = 0;
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if (fpeRaised & FE_INVALID) { res |= FP_EXC_NV_C; }
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if (fpeRaised & FE_DIVBYZERO) { res |= FP_EXC_DZ_C; }
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if (fpeRaised & FE_OVERFLOW) { res |= FP_EXC_OF_C; }
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if (fpeRaised & FE_UNDERFLOW) { res |= FP_EXC_UF_C; }
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if (fpeRaised & FE_INEXACT) { res |= FP_EXC_NX_C; }
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feclearexcept(FE_ALL_EXCEPT);
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return res;
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}
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// ################################################################################################
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// "Intrinsics"
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// ################################################################################################
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@ -6,8 +6,8 @@ TOPTARGETS := exe clean_all check info all
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SUBDIRS := $(wildcard */.)
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# ignore dummy folders (starting with '~')
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EXCLDIR := $(wildcard ~*/.)
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# ignore the Eclipse project
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EXCLDIR += eclipse/.
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# ignore some of the default projects/examples
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EXCLDIR += eclipse/. dhrystone/. performance_tests/. float_corner_test/.
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SUBDIRS := $(filter-out $(EXCLDIR), $(SUBDIRS))
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$(TOPTARGETS): $(SUBDIRS)
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