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[sw/example] update example programs

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stnolting 2023-01-21 14:59:17 +01:00
parent ff24de0f05
commit 45c87099bd
12 changed files with 41 additions and 41 deletions
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6
sw/example/bus_explorer/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -87,8 +87,8 @@ int main() {
// capture all exceptions and give debug info via UART
neorv32_rte_setup();
// disable global interrupts
neorv32_cpu_dint();
// disable all interrupt sources
neorv32_cpu_csr_write(CSR_MIE, 0);
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);

4
sw/example/coremark/core_portme.c
View file

@ -149,8 +149,8 @@ portable_init(core_portable *p, int *argc, char *argv[])
#endif
{
/* NEORV32-specific */
neorv32_cpu_dint(); // no interrupt, thanks
neorv32_rte_setup(); // capture all exceptions and give debug information, ho hw flow control
neorv32_cpu_csr_write(CSR_MIE, 0); // no interrupt, thanks
neorv32_rte_setup(); // capture all exceptions and give debug information, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);

6
sw/example/demo_gptmr/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -93,8 +93,8 @@ int main() {
neorv32_gptmr_setup(CLK_PRSC_8, 1, NEORV32_SYSINFO.CLK / (8 * 2));
// enable interrupt
neorv32_cpu_irq_enable(GPTMR_FIRQ_ENABLE); // enable GPTMR FIRQ channel
neorv32_cpu_eint(); // enable global interrupt flag
neorv32_cpu_csr_set(CSR_MIE, 1 << GPTMR_FIRQ_ENABLE); // enable GPTMR FIRQ channel
neorv32_cpu_csr_set(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE); // enable machine-mode interrupts
// go to sleep mode and wait for interrupt

6
sw/example/demo_mtime/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -94,8 +94,8 @@ int main() {
neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (NEORV32_SYSINFO.CLK / 2));
// enable interrupt
neorv32_cpu_irq_enable(CSR_MIE_MTIE); // enable MTIME interrupt
neorv32_cpu_eint(); // enable global interrupt flag
neorv32_cpu_csr_set(CSR_MIE, 1 << CSR_MIE_MTIE); // enable MTIME interrupt
neorv32_cpu_csr_set(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE); // enable machine-mode interrupts
// go to sleep mode and wait for interrupt

10
sw/example/demo_slink/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -72,7 +72,7 @@ int main() {
// capture all exceptions and give debug info via UART0
neorv32_rte_setup();
// init UART0 at default baud rate, no parity bits, no hw flow control
// setup UART0 at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check if UART0 unit is implemented at all
@ -110,9 +110,9 @@ int main() {
// NEORV32 runtime environment: install SLINK FIRQ handlers
neorv32_rte_handler_install(SLINK_RX_RTE_ID, slink_rx_firq_handler);
neorv32_rte_handler_install(SLINK_TX_RTE_ID, slink_tx_firq_handler);
neorv32_cpu_irq_enable(SLINK_RX_FIRQ_ENABLE); // enable SLINK RX FIRQ
neorv32_cpu_irq_enable(SLINK_TX_FIRQ_ENABLE); // enable SLINK RX FIRQ
neorv32_cpu_eint(); // enable global interrupt flag
neorv32_cpu_csr_set(CSR_MIE, 1 << SLINK_RX_FIRQ_ENABLE); // enable SLINK RX FIRQ
neorv32_cpu_csr_set(CSR_MIE, 1 << SLINK_TX_FIRQ_ENABLE); // enable SLINK RX FIRQ
neorv32_cpu_csr_set(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE); // enable machine-mode interrupts
// do some demo transmissions

6
sw/example/demo_spi_irq/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -105,8 +105,8 @@ int main()
// enable IRQ system
neorv32_rte_handler_install(SPI_RTE_ID, spi_irq_handler); // SPI to RTE
neorv32_cpu_irq_enable(SPI_FIRQ_ENABLE); // FIRQ6: SPI Interrupt
neorv32_cpu_eint(); // enable global interrupts
neorv32_cpu_csr_set(CSR_MIE, 1 << SPI_FIRQ_ENABLE); // enable SPI FIRQ
neorv32_cpu_csr_set(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE); // enable machine-mode interrupts
// SPI
// SPI Control

9
sw/example/demo_trigger_module/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -84,9 +84,12 @@ int main() {
// configure trigger module
uint32_t trig_addr = (uint32_t)(&dummy_function);
neorv32_cpu_csr_write(CSR_TDATA2, trig_addr); // trigger address
neorv32_cpu_csr_write(CSR_TDATA1, (1<<2)); // set 'exe': enable trigger
neorv32_uart0_printf("Trigger address set to 0x%x.\n", trig_addr);
neorv32_cpu_csr_write(CSR_TDATA1, (1 << 2) | // exe = 1: enable trigger module operation
(0 << 12) | // action = 0: raise ebereak exception but do not enter debug-mode
(0 << 27)); // dnode = 0: no exclusive access to trigger module from debug-mode
neorv32_uart0_printf("Calling dummy function... (this will cause the EBREAK exception)\n");
// call function - this will cause the trigger module to fire, which will result in an EBREAK
// exception that is captured by the RTE's debug handler
@ -103,5 +106,5 @@ int main() {
**************************************************************************/
void __attribute__ ((noinline)) dummy_function(void) {
neorv32_uart0_printf("Hello from the dummy program!\n");
neorv32_uart0_printf("Hello from the dummy function!\n");
}

4
sw/example/demo_wdt/main.c
View file

@ -107,8 +107,8 @@ int main() {
// this IRQ will trigger when half of the configured WDT timeout interval has been reached
neorv32_uart0_puts("Configuring WDT interrupt...\n");
neorv32_rte_handler_install(WDT_RTE_ID, wdt_firq_handler);
neorv32_cpu_irq_enable(WDT_FIRQ_ENABLE);
neorv32_cpu_eint(); // enable global interrupt flag
neorv32_cpu_csr_set(CSR_MIE, 1 << WDT_FIRQ_ENABLE); // enable WDT FIRQ channel
neorv32_cpu_csr_set(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE); // enable machine-mode interrupts
// compute WDT timeout value

8
sw/example/demo_xirq/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -70,7 +70,7 @@ int main() {
// this will take care of handling all CPU traps (interrupts and exceptions)
neorv32_rte_setup();
// setup UART0 at default baud rate, no parity bits, no hw flow control
// setup UART0 at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check if XIRQ unit is implemented at all
@ -116,8 +116,8 @@ int main() {
// allow XIRQ to trigger CPU interrupt
neorv32_xirq_global_enable();
// enable global interrupts
neorv32_cpu_eint();
// enable machine-mode interrupts
neorv32_cpu_csr_set(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE);
// the code below assumes the XIRQ inputs are connected to the processor's GPIO output port

8
sw/example/dhrystone/dhry_1.c
View file

@ -102,7 +102,7 @@ int main (void)
{ /* ***** NEORV32-SPECIFIC ***** */
neorv32_cpu_dint(); // no interrupt, thanks
neorv32_cpu_csr_write(CSR_MIE, 0); // no interrupt, thanks
neorv32_rte_setup(); // capture all exceptions and give debug information, ho hw flow control
neorv32_uart0_setup(19200, PARITY_NONE, FLOW_CONTROL_NONE);
// check available hardware extensions and compare with compiler flags
@ -118,7 +118,7 @@ int main (void)
#warning DHRYSTONE HAS NOT BEEN COMPILED! Use >>make USER_FLAGS+=-DRUN_DHRYSTONE clean_all exe<< to compile it.
// inform the user if you are actually executing this
neorv32_uart0_printf("ERROR! CoreMark has not been compiled. Use >>make USER_FLAGS+=-DRUN_COREMARK clean_all exe<< to compile it.\n");
neorv32_uart0_printf("ERROR! DhryStone has not been compiled. Use >>make USER_FLAGS+=-RUN_DHRYSTONE clean_all exe<< to compile it.\n");
while(1);
#endif
@ -195,7 +195,7 @@ int main (void)
*/
{ /* ***** NEORV32-SPECIFIC ***** */
Begin_Time = (long)neorv32_cpu_get_systime();
Begin_Time = (long)neorv32_mtime_get_time();
} /* ***** /NEORV32-SPECIFIC ***** */
for (Run_Index = 1; Run_Index <= Number_Of_Runs; ++Run_Index)
@ -262,7 +262,7 @@ int main (void)
*/
{ /* ***** NEORV32-SPECIFIC ***** */
End_Time = (long)neorv32_cpu_get_systime();
End_Time = (long)neorv32_mtime_get_time();
} /* ***** /NEORV32-SPECIFIC ***** */

7
sw/example/hello_cpp/main.cpp
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -87,12 +87,9 @@ int main() {
// this is not required, but keeps us safe
neorv32_rte_setup();
// init UART at default baud rate, no parity bits, ho hw flow control
// setup UART at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
// print project logo via UART
neorv32_rte_print_logo();

8
sw/lib/source/neorv32_xirq.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -97,7 +97,7 @@ int neorv32_xirq_setup(void) {
void neorv32_xirq_global_enable(void) {
// enable XIRQ fast interrupt channel
neorv32_cpu_irq_enable(XIRQ_FIRQ_ENABLE);
neorv32_cpu_csr_set(CSR_MIE, 1 << XIRQ_FIRQ_ENABLE);
}
@ -107,7 +107,7 @@ void neorv32_xirq_global_enable(void) {
void neorv32_xirq_global_disable(void) {
// enable XIRQ fast interrupt channel
neorv32_cpu_irq_disable(XIRQ_FIRQ_ENABLE);
neorv32_cpu_csr_clr(CSR_MIE, 1 << XIRQ_FIRQ_ENABLE);
}
@ -123,7 +123,7 @@ int neorv32_xirq_get_num(void) {
if (neorv32_xirq_available()) {
neorv32_cpu_irq_disable(XIRQ_FIRQ_ENABLE); // make sure XIRQ cannot fire
neorv32_cpu_csr_clr(CSR_MIE, 1 << XIRQ_FIRQ_ENABLE); // make sure XIRQ cannot fire
NEORV32_XIRQ.IER = 0xffffffff; // try to set all enable flags
enable = NEORV32_XIRQ.IER; // read back actually set flags