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https://github.com/stnolting/neorv32.git
synced 2025-04-24 22:27:21 -04:00
XIRQ: Change "variable style" by "pointer style"
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commit
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3 changed files with 19 additions and 19 deletions
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@ -1231,8 +1231,8 @@ int main() {
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test_fail();
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}
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NEORV32_XIRQ.IER = 0;
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NEORV32_XIRQ.IPR = -1;
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NEORV32_XIRQ->IER = 0;
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NEORV32_XIRQ->IPR = -1;
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// ----------------------------------------------------------
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@ -951,7 +951,7 @@ enum NEORV32_BUSKEEPER_CTRL_enum {
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**************************************************************************/
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/**@{*/
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/** XIRQ module prototype */
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typedef struct __attribute__((packed,aligned(4))) {
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typedef volatile struct __attribute__((packed,aligned(4))) {
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uint32_t IER; /**< offset 0: IRQ input enable register */
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uint32_t IPR; /**< offset 4: pending IRQ register /ack/clear */
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uint32_t SCR; /**< offset 8: interrupt source register */
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@ -962,7 +962,7 @@ typedef struct __attribute__((packed,aligned(4))) {
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#define NEORV32_XIRQ_BASE (0xFFFFFF80U)
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/** XIRQ module hardware access (#neorv32_xirq_t) */
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#define NEORV32_XIRQ (*((volatile neorv32_xirq_t*) (NEORV32_XIRQ_BASE)))
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#define NEORV32_XIRQ ((neorv32_xirq_t*) (NEORV32_XIRQ_BASE))
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/**@}*/
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@ -77,9 +77,9 @@ int neorv32_xirq_available(void) {
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**************************************************************************/
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int neorv32_xirq_setup(void) {
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NEORV32_XIRQ.IER = 0; // disable all input channels
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NEORV32_XIRQ.IPR = 0; // clear all pending IRQs
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NEORV32_XIRQ.SCR = 0; // acknowledge (clear) XIRQ interrupt
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NEORV32_XIRQ->IER = 0; // disable all input channels
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NEORV32_XIRQ->IPR = 0; // clear all pending IRQs
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NEORV32_XIRQ->SCR = 0; // acknowledge (clear) XIRQ interrupt
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int i;
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for (i=0; i<32; i++) {
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@ -124,8 +124,8 @@ int neorv32_xirq_get_num(void) {
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if (neorv32_xirq_available()) {
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neorv32_cpu_csr_clr(CSR_MIE, 1 << XIRQ_FIRQ_ENABLE); // make sure XIRQ cannot fire
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NEORV32_XIRQ.IER = 0xffffffff; // try to set all enable flags
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enable = NEORV32_XIRQ.IER; // read back actually set flags
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NEORV32_XIRQ->IER = 0xffffffff; // try to set all enable flags
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enable = NEORV32_XIRQ->IER; // read back actually set flags
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// count set bits in enable
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cnt = 0;
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@ -151,7 +151,7 @@ int neorv32_xirq_get_num(void) {
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void neorv32_xirq_clear_pending(uint8_t ch) {
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if (ch < 32) { // channel valid?
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NEORV32_XIRQ.IPR = ~(1 << ch);
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NEORV32_XIRQ->IPR = ~(1 << ch);
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}
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}
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@ -164,7 +164,7 @@ void neorv32_xirq_clear_pending(uint8_t ch) {
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void neorv32_xirq_channel_enable(uint8_t ch) {
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if (ch < 32) { // channel valid?
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NEORV32_XIRQ.IER |= 1 << ch;
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NEORV32_XIRQ->IER |= 1 << ch;
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}
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}
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@ -177,7 +177,7 @@ void neorv32_xirq_channel_enable(uint8_t ch) {
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void neorv32_xirq_channel_disable(uint8_t ch) {
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if (ch < 32) { // channel valid?
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NEORV32_XIRQ.IER &= ~(1 << ch);
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NEORV32_XIRQ->IER &= ~(1 << ch);
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}
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}
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@ -197,8 +197,8 @@ int neorv32_xirq_install(uint8_t ch, void (*handler)(void)) {
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if (ch < 32) {
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__neorv32_xirq_vector_lut[ch] = (uint32_t)handler; // install handler
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uint32_t mask = 1 << ch;
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NEORV32_XIRQ.IPR = ~mask; // clear if pending
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NEORV32_XIRQ.IER |= mask; // enable channel
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NEORV32_XIRQ->IPR = ~mask; // clear if pending
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NEORV32_XIRQ->IER |= mask; // enable channel
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return 0;
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}
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return 1;
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@ -219,8 +219,8 @@ int neorv32_xirq_uninstall(uint8_t ch) {
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if (ch < 32) {
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__neorv32_xirq_vector_lut[ch] = (uint32_t)(&__neorv32_xirq_dummy_handler); // override using dummy handler
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uint32_t mask = 1 << ch;
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NEORV32_XIRQ.IER &= ~mask; // disable channel
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NEORV32_XIRQ.IPR = ~mask; // clear if pending
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NEORV32_XIRQ->IER &= ~mask; // disable channel
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NEORV32_XIRQ->IPR = ~mask; // clear if pending
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return 0;
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}
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return 1;
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@ -235,7 +235,7 @@ static void __neorv32_xirq_core(void) {
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neorv32_cpu_csr_write(CSR_MIP, ~(1 << XIRQ_FIRQ_PENDING)); // acknowledge XIRQ FIRQ
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uint32_t src = NEORV32_XIRQ.SCR; // get IRQ source (with highest priority)
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uint32_t src = NEORV32_XIRQ->SCR; // get IRQ source (with highest priority)
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// execute handler
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uint32_t xirq_handler = __neorv32_xirq_vector_lut[src];
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@ -244,8 +244,8 @@ static void __neorv32_xirq_core(void) {
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(*handler_pnt)();
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uint32_t mask = 1 << src;
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NEORV32_XIRQ.IPR = ~mask; // clear current pending interrupt
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NEORV32_XIRQ.SCR = 0; // acknowledge current XIRQ interrupt
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NEORV32_XIRQ->IPR = ~mask; // clear current pending interrupt
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NEORV32_XIRQ->SCR = 0; // acknowledge current XIRQ interrupt
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}
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