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[sw] added mstatus.SD and mstatus.FS bits

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stnolting 2021-08-05 17:31:08 +02:00
parent 32826d2183
commit 5d39d65e8c
3 changed files with 11 additions and 2 deletions
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2
sw/common/crt0.S
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@ -83,6 +83,8 @@ __crt0_cpu_csr_init:
csrw minstreth, zero csrw minstreth, zero
#if defined(__riscv_flen) #if defined(__riscv_flen)
li x11, 0x00005000 // enable FPU (state = initial)
csrs mstatus, x11
csrw fcsr, zero // reset floating-point CSR csrw fcsr, zero // reset floating-point CSR
#endif #endif

6
sw/example/floating_point_test/main.c
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@ -148,9 +148,13 @@ int main() {
neorv32_uart_printf("Test cases per instruction: %u\n", (uint32_t)NUM_TEST_CASES); neorv32_uart_printf("Test cases per instruction: %u\n", (uint32_t)NUM_TEST_CASES);
neorv32_uart_printf("NOTE: The NEORV32 FPU does not support subnormal numbers yet. Subnormal numbers are flushed to zero.\n\n"); neorv32_uart_printf("NOTE: The NEORV32 FPU does not support subnormal numbers yet. Subnormal numbers are flushed to zero.\n\n");
// enable FPU extension
uint32_t mstatus = neorv32_cpu_csr_read(CSR_MSTATUS);
mstatus |= 1 << CSR_MSTATUS_FS_L; // state = initial
neorv32_cpu_csr_write(CSR_MSTATUS, mstatus);
// clear exception status word // clear exception status word
neorv32_cpu_csr_write(CSR_FFLAGS, 0);; // real hardware neorv32_cpu_csr_write(CSR_FFLAGS, 0); // real hardware
feclearexcept(FE_ALL_EXCEPT); // software runtime (GCC floating-point emulation) feclearexcept(FE_ALL_EXCEPT); // software runtime (GCC floating-point emulation)

5
sw/lib/include/neorv32.h
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@ -282,7 +282,10 @@ enum NEORV32_CSR_MSTATUS_enum {
CSR_MSTATUS_MPIE = 7, /**< CPU mstatus CSR (7): MPIE - Machine previous interrupt enable bit (r/w) */ CSR_MSTATUS_MPIE = 7, /**< CPU mstatus CSR (7): MPIE - Machine previous interrupt enable bit (r/w) */
CSR_MSTATUS_MPP_L = 11, /**< CPU mstatus CSR (11): MPP_L - Machine previous privilege mode bit low (r/w) */ CSR_MSTATUS_MPP_L = 11, /**< CPU mstatus CSR (11): MPP_L - Machine previous privilege mode bit low (r/w) */
CSR_MSTATUS_MPP_H = 12, /**< CPU mstatus CSR (12): MPP_H - Machine previous privilege mode bit high (r/w) */ CSR_MSTATUS_MPP_H = 12, /**< CPU mstatus CSR (12): MPP_H - Machine previous privilege mode bit high (r/w) */
CSR_MSTATUS_TW = 21 /**< CPU mstatus CSR (21): TW - timeout wait (trigger illegal instruction exception if WFI is executed outside of m-mode when set) (r/w) */ CSR_MSTATUS_FS_L = 13, /**< CPU mstatus CSR (13): FS_L - FPU state bit low (r/w) */
CSR_MSTATUS_FS_H = 14, /**< CPU mstatus CSR (14): FS_H - FPU state bit high (r/w) */
CSR_MSTATUS_TW = 21, /**< CPU mstatus CSR (21): TW - timeout wait (trigger illegal instruction exception if WFI is executed outside of m-mode when set) (r/w) */
CSR_MSTATUS_SD = 31 /**< CPU mstatus CSR (31): SD - extension's state summary (set = non-clean) (r/-) */
}; };