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minor edits

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stnolting 2020-09-11 21:36:06 +02:00
parent 77191df181
commit 622d58f858
3 changed files with 7 additions and 9 deletions
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5
rtl/core/neorv32_cpu_alu.vhd
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@ -114,7 +114,6 @@ architecture neorv32_cpu_cpu_rtl of neorv32_cpu_alu is
signal cp_ctrl : cp_ctrl_t;
-- bit manipulation --
-- TODO
signal bitm_res : std_ulogic_vector(31 downto 0);
begin
@ -194,7 +193,7 @@ begin
shifter.sreg <= opa; -- shift operand
shifter.cnt <= opb(index_size_f(data_width_c)-1 downto 0); -- shift amount
elsif (shifter.run = '1') then -- running shift
-- coarse shift -> multiples of 4 --
-- coarse shift: multiples of 4 --
if (or_all_f(shifter.cnt(shifter.cnt'left downto 2)) = '1') then -- shift amount >= 4
shifter.cnt <= std_ulogic_vector(unsigned(shifter.cnt) - 4);
if (ctrl_i(ctrl_alu_shift_dir_c) = '0') then -- SLL: shift left logical
@ -205,7 +204,7 @@ begin
(shifter.sreg(shifter.sreg'left) and ctrl_i(ctrl_alu_shift_ar_c)) &
(shifter.sreg(shifter.sreg'left) and ctrl_i(ctrl_alu_shift_ar_c)) & shifter.sreg(shifter.sreg'left downto 4);
end if;
-- fine shift -> 0..3 --
-- fine shift: single shifts, 0..3 times --
else
shifter.cnt <= std_ulogic_vector(unsigned(shifter.cnt) - 1);
if (ctrl_i(ctrl_alu_shift_dir_c) = '0') then -- SLL: shift left logical

7
rtl/core/neorv32_cpu_control.vhd
View file

@ -942,7 +942,6 @@ begin
end if;
-- check CSR access --
csr_acc_valid <= '0'; -- default
case execute_engine.i_reg(instr_funct12_msb_c downto instr_funct12_lsb_c) is
when x"300" => csr_acc_valid <= is_m_mode_v; -- mstatus
when x"301" => csr_acc_valid <= is_m_mode_v; -- misa
@ -1684,10 +1683,10 @@ begin
-- machine information registers --
when x"f11" => -- R/-: mvendorid
csr_rdata_o <= (others => '0'); -- not available for NEORV32
csr_rdata_o <= (others => '0'); -- not assigned
when x"f12" => -- R/-: marchid
csr_rdata_o <= (others => '0'); -- not available for NEORV32
when x"f13" => -- R/-: mimpid - implementation ID / NEORV32: version
csr_rdata_o <= (others => '0'); -- not assigned
when x"f13" => -- R/-: mimpid - implementation ID / NEORV32 version
csr_rdata_o <= hw_version_c;
when x"f14" => -- R/-: mhartid - hardware thread ID
csr_rdata_o <= HW_THREAD_ID;

4
sw/example/cpu_test/main.c
View file

@ -1008,8 +1008,8 @@ int main() {
exe_cycles.uint64 = neorv32_cpu_get_cycle();
exe_instr.uint64 = neorv32_cpu_get_instret();
neorv32_uart_printf("\n\nExecuted instructions: 0x%x_%x\n", exe_instr.uint32[1], exe_instr.uint32[0]);
neorv32_uart_printf( "Clock cycles: 0x%x_%x\n", exe_cycles.uint32[1], exe_cycles.uint32[0]);
neorv32_uart_printf("\n\nExecuted instructions: %u\n", exe_instr.uint32[0]);
neorv32_uart_printf( "Required clock cycles: %u\n", exe_cycles.uint32[0]);
neorv32_uart_printf("\nTests: %i\nOK: %i\nFAIL: %i\n\n", cnt_test, cnt_ok, cnt_fail);