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https://github.com/stnolting/neorv32.git
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[sw/lib] initialize all variables (and arrays)
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7 changed files with 46 additions and 58 deletions
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@ -26,7 +26,7 @@
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**************************************************************************/
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uint64_t neorv32_aux_date2unixtime(date_t* date) {
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uint32_t y, m, d, t;
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uint32_t y = 0, m = 0, d = 0, t = 0;
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// range checks
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if (date->year < 1970) {
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@ -83,7 +83,7 @@ uint64_t neorv32_aux_date2unixtime(date_t* date) {
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**************************************************************************/
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void neorv32_aux_unixtime2date(uint64_t unixtime, date_t* date) {
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uint32_t a, b, c, d, e, f;
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uint32_t a = 0, b = 0, c = 0, d = 0, e = 0, f = 0;
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// invalid
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if (unixtime < 1) {
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@ -213,9 +213,14 @@ uint32_t neorv32_aux_xorshift32(void) {
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void neorv32_aux_itoa(char *buffer, uint32_t num, uint32_t base) {
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const char digits[16] = {'0','1','2','3','4','5','6','7','8','9','a','b','c','d','e','f'};
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char tmp[33];
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char *tmp_ptr;
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unsigned int i;
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char __attribute__((aligned(4))) tmp[36]; // optimize stack layout
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char *tmp_ptr = 0;
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unsigned int i = 0;
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// prevent uninitialized stack bytes
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for (i=0; i<sizeof(tmp); i++) {
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tmp[i] = 0;
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}
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if ((base < 2) || (base > 16)) { // invalid base?
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*buffer = '\0';
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@ -258,8 +263,8 @@ void neorv32_aux_print_hw_config(void) {
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return; // cannot output anything if UART0 is not implemented
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}
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uint32_t tmp;
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int i;
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uint32_t tmp = 0;
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int i = 0;
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neorv32_uart0_printf("\n\n<< NEORV32 Processor Configuration >>\n\n");
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@ -540,8 +545,8 @@ void neorv32_aux_print_hw_config(void) {
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**************************************************************************/
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void neorv32_aux_print_hw_version(uint32_t impid) {
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uint32_t i;
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char tmp, cnt;
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uint32_t i = 0;
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char tmp = 0, cnt = 0;
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if (neorv32_uart0_available() != 0) { // cannot output anything if UART0 is not implemented
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for (i=0; i<4; i++) {
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@ -598,9 +603,9 @@ void neorv32_aux_print_logo(void) {
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{0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0300, 0xc630}
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};
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unsigned int x, y, z;
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uint16_t tmp;
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char c;
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unsigned int x = 0, y = 0, z = 0;
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uint16_t tmp = 0;
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char c = 0;
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if (neorv32_uart0_available() != 0) { // cannot output anything if UART0 is not implemented
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for (y=0; y<(sizeof(logo_c) / sizeof(logo_c[0])); y++) {
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@ -9,8 +9,6 @@
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/**
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* @file neorv32_clint.c
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* @brief Hardware Local Interruptor (CLINT) HW driver source file.
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*
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* @see https://stnolting.github.io/neorv32/sw/files.html
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*/
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#include <neorv32.h>
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@ -93,7 +91,7 @@ void neorv32_clint_time_set(uint64_t time) {
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**************************************************************************/
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uint64_t neorv32_clint_time_get(void) {
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uint32_t tmp1, tmp2, tmp3;
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uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
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while(1) {
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tmp1 = NEORV32_CLINT->MTIME.uint32[1];
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tmp2 = NEORV32_CLINT->MTIME.uint32[0];
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@ -1,7 +1,7 @@
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// ================================================================================ //
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// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 //
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// Copyright (c) NEORV32 contributors. //
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// Copyright (c) 2020 - 2024 Stephan Nolting. All rights reserved. //
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// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. //
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// Licensed under the BSD-3-Clause license, see LICENSE for details. //
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// SPDX-License-Identifier: BSD-3-Clause //
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// ================================================================================ //
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@ -9,8 +9,6 @@
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/**
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* @file neorv32_cpu.c
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* @brief CPU Core Functions HW driver source file.
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*
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* @see https://stnolting.github.io/neorv32/sw/files.html
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*/
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#include <neorv32.h>
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@ -45,9 +43,7 @@
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**************************************************************************/
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uint64_t neorv32_cpu_get_cycle(void) {
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subwords64_t cycles;
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uint32_t tmp1, tmp2, tmp3;
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uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
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while(1) {
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tmp1 = neorv32_cpu_csr_read(CSR_CYCLEH);
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tmp2 = neorv32_cpu_csr_read(CSR_CYCLE);
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@ -57,6 +53,7 @@ uint64_t neorv32_cpu_get_cycle(void) {
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}
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}
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subwords64_t cycles;
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cycles.uint32[0] = tmp2;
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cycles.uint32[1] = tmp3;
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@ -72,7 +69,6 @@ uint64_t neorv32_cpu_get_cycle(void) {
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void neorv32_cpu_set_mcycle(uint64_t value) {
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subwords64_t cycles;
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cycles.uint64 = value;
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// prevent low-to-high carry while writing
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@ -89,9 +85,7 @@ void neorv32_cpu_set_mcycle(uint64_t value) {
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**************************************************************************/
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uint64_t neorv32_cpu_get_instret(void) {
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subwords64_t cycles;
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uint32_t tmp1, tmp2, tmp3;
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uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
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while(1) {
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tmp1 = neorv32_cpu_csr_read(CSR_INSTRETH);
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tmp2 = neorv32_cpu_csr_read(CSR_INSTRET);
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@ -101,6 +95,7 @@ uint64_t neorv32_cpu_get_instret(void) {
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}
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}
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subwords64_t cycles;
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cycles.uint32[0] = tmp2;
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cycles.uint32[1] = tmp3;
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@ -116,7 +111,6 @@ uint64_t neorv32_cpu_get_instret(void) {
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void neorv32_cpu_set_minstret(uint64_t value) {
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subwords64_t cycles;
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cycles.uint64 = value;
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// prevent low-to-high carry while writing
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@ -144,9 +138,8 @@ void neorv32_cpu_delay_ms(uint32_t time_ms) {
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// use CYCLE CSRs
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// -------------------------------------------
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if ( (neorv32_cpu_csr_read(CSR_MXISA) & (1<<CSR_MXISA_ZICNTR)) && // cycle counter available?
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((neorv32_cpu_csr_read(CSR_MCOUNTINHIBIT) & (1<<CSR_MCOUNTINHIBIT_CY)) == 0) ) { // counter is running?
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if ((neorv32_cpu_csr_read(CSR_MXISA) & (1<<CSR_MXISA_ZICNTR)) && // cycle counter available?
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((neorv32_cpu_csr_read(CSR_MCOUNTINHIBIT) & (1<<CSR_MCOUNTINHIBIT_CY)) == 0)) { // counter is running?
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tmp = neorv32_cpu_get_cycle() + wait_cycles;
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while (neorv32_cpu_get_cycle() < tmp);
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}
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@ -154,7 +147,6 @@ void neorv32_cpu_delay_ms(uint32_t time_ms) {
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// use MTIME machine timer
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// -------------------------------------------
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else if (NEORV32_SYSINFO->SOC & (1 << SYSINFO_SOC_IO_CLINT)) { // MTIMER available?
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tmp = neorv32_clint_time_get() + wait_cycles;
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while (neorv32_clint_time_get() < tmp);
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}
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@ -162,10 +154,8 @@ void neorv32_cpu_delay_ms(uint32_t time_ms) {
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// simple loop as fall-back (imprecise!)
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// -------------------------------------------
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else {
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const uint32_t loop_cycles_c = 16; // clock cycles per iteration of the ASM loop
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uint32_t iterations = (uint32_t)(wait_cycles / loop_cycles_c);
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asm volatile (" .balign 4 \n" // make sure this is 32-bit aligned
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" __neorv32_cpu_delay_ms_start: \n"
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" beq %[cnt_r], zero, __neorv32_cpu_delay_ms_end \n" // 3 cycles (not taken)
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@ -408,7 +398,7 @@ uint32_t neorv32_cpu_hpm_get_num_counters(void) {
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**************************************************************************/
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uint32_t neorv32_cpu_hpm_get_size(void) {
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uint32_t tmp, cnt;
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uint32_t tmp = 0, cnt = 0;
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// HPMs implemented at all?
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if ((neorv32_cpu_csr_read(CSR_MXISA) & (1<<CSR_MXISA_ZIHPM)) == 0) {
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@ -9,8 +9,6 @@
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/**
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* @file neorv32_rte.c
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* @brief NEORV32 Runtime Environment.
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*
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* @see https://stnolting.github.io/neorv32/sw/files.html
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*/
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#include <neorv32.h>
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@ -155,7 +153,7 @@ void __attribute__((__naked__,aligned(4))) neorv32_rte_core(void) {
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asm volatile ("fence");
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// find according trap handler base address
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uint32_t handler_base;
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uint32_t handler_base = 0;
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switch (neorv32_cpu_csr_read(CSR_MCAUSE)) {
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case TRAP_CODE_I_ACCESS: handler_base = __neorv32_rte_vector_lut[RTE_TRAP_I_ACCESS]; break;
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case TRAP_CODE_I_ILLEGAL: handler_base = __neorv32_rte_vector_lut[RTE_TRAP_I_ILLEGAL]; break;
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**************************************************************************/
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void __neorv32_rte_print_hex(uint32_t num, int digits) {
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int i;
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static const char hex_symbols[] = "0123456789ABCDEF";
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int i = 0;
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const char hex_symbols[] = "0123456789ABCDEF";
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if (neorv32_uart0_available() != 0) { // cannot output anything if UART0 is not implemented
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neorv32_uart0_putc('0');
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@ -1,7 +1,7 @@
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// ================================================================================ //
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// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 //
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// Copyright (c) NEORV32 contributors. //
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// Copyright (c) 2020 - 2024 Stephan Nolting. All rights reserved. //
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// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. //
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// Licensed under the BSD-3-Clause license, see LICENSE for details. //
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// SPDX-License-Identifier: BSD-3-Clause //
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// ================================================================================ //
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/**
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* @file neorv32_trng.c
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* @brief True Random Number Generator (TRNG) HW driver source file.
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*
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* @note These functions should only be used if the TRNG unit was synthesized (IO_TRNG_EN = true).
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*
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* @see https://stnolting.github.io/neorv32/sw/files.html
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*/
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#include <neorv32.h>
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@ -42,7 +38,7 @@ void neorv32_trng_enable(void) {
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NEORV32_TRNG->CTRL = 0; // disable and reset
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// wait for all internal components to reset
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int i;
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int i = 0;
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for (i=0; i<256; i++) {
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asm volatile ("nop");
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}
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@ -1,7 +1,7 @@
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// ================================================================================ //
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// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 //
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// Copyright (c) NEORV32 contributors. //
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// Copyright (c) 2020 - 2024 Stephan Nolting. All rights reserved. //
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// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. //
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// Licensed under the BSD-3-Clause license, see LICENSE for details. //
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// SPDX-License-Identifier: BSD-3-Clause //
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// ================================================================================ //
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@ -9,10 +9,6 @@
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/**
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* @file neorv32_twi.c
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* @brief Two-Wire Interface Controller (TWI) HW driver source file.
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*
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* @note These functions should only be used if the TWI unit was synthesized (IO_TWI_EN = true).
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*
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* @see https://stnolting.github.io/neorv32/sw/files.html
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*/
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#include <neorv32.h>
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@ -161,8 +157,8 @@ int neorv32_twi_get(uint8_t *data) {
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**************************************************************************/
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int neorv32_twi_trans(uint8_t *data, int mack) {
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uint8_t rx_data;
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int device_ack;
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uint8_t rx_data = 0;
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int device_ack = 0;
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while (NEORV32_TWI->CTRL & (1<<TWI_CTRL_TX_FULL)); // wait for free TX entry
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@ -48,10 +48,10 @@ int neorv32_uart_scan(neorv32_uart_t *UARTx, char *buffer, int max_size, int ec
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**************************************************************************/
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int neorv32_uart_available(neorv32_uart_t *UARTx) {
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if ( ((uint32_t)UARTx == NEORV32_UART0_BASE) && (NEORV32_SYSINFO->SOC & (1 << SYSINFO_SOC_IO_UART0)) ) {
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if (((uint32_t)UARTx == NEORV32_UART0_BASE) && (NEORV32_SYSINFO->SOC & (1 << SYSINFO_SOC_IO_UART0))) {
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return 1;
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}
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else if ( ((uint32_t)UARTx == NEORV32_UART1_BASE) && (NEORV32_SYSINFO->SOC & (1 << SYSINFO_SOC_IO_UART1)) ) {
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else if (((uint32_t)UARTx == NEORV32_UART1_BASE) && (NEORV32_SYSINFO->SOC & (1 << SYSINFO_SOC_IO_UART1))) {
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return 1;
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}
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else {
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**************************************************************************/
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void neorv32_uart_vprintf(neorv32_uart_t *UARTx, const char *format, va_list args) {
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char c;
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char string_buf[33];
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int32_t n;
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unsigned int tmp;
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char c = 0;
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char __attribute__((aligned(4))) string_buf[36]; // optimize stack layout
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int32_t n = 0;
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unsigned int tmp = 0;
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// prevent uninitialized stack bytes
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for (n=0; n<sizeof(string_buf); n++) {
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string_buf[n] = 0;
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}
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while ((c = *format++)) {
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if (c == '%') {
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neorv32_uart_putc(UARTx, c);
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break;
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default: // unsupported formating character
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default: // unsupported formatting character
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neorv32_uart_putc(UARTx, '%');
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neorv32_uart_putc(UARTx, c);
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break;
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