[sw/lib] initialize all variables (and arrays)
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This commit is contained in:
stnolting 2025-01-20 21:39:37 +01:00
parent 1e49d6681d
commit 6344f7198e
7 changed files with 46 additions and 58 deletions

View file

@ -26,7 +26,7 @@
**************************************************************************/
uint64_t neorv32_aux_date2unixtime(date_t* date) {
uint32_t y, m, d, t;
uint32_t y = 0, m = 0, d = 0, t = 0;
// range checks
if (date->year < 1970) {
@ -83,7 +83,7 @@ uint64_t neorv32_aux_date2unixtime(date_t* date) {
**************************************************************************/
void neorv32_aux_unixtime2date(uint64_t unixtime, date_t* date) {
uint32_t a, b, c, d, e, f;
uint32_t a = 0, b = 0, c = 0, d = 0, e = 0, f = 0;
// invalid
if (unixtime < 1) {
@ -213,9 +213,14 @@ uint32_t neorv32_aux_xorshift32(void) {
void neorv32_aux_itoa(char *buffer, uint32_t num, uint32_t base) {
const char digits[16] = {'0','1','2','3','4','5','6','7','8','9','a','b','c','d','e','f'};
char tmp[33];
char *tmp_ptr;
unsigned int i;
char __attribute__((aligned(4))) tmp[36]; // optimize stack layout
char *tmp_ptr = 0;
unsigned int i = 0;
// prevent uninitialized stack bytes
for (i=0; i<sizeof(tmp); i++) {
tmp[i] = 0;
}
if ((base < 2) || (base > 16)) { // invalid base?
*buffer = '\0';
@ -258,8 +263,8 @@ void neorv32_aux_print_hw_config(void) {
return; // cannot output anything if UART0 is not implemented
}
uint32_t tmp;
int i;
uint32_t tmp = 0;
int i = 0;
neorv32_uart0_printf("\n\n<< NEORV32 Processor Configuration >>\n\n");
@ -540,8 +545,8 @@ void neorv32_aux_print_hw_config(void) {
**************************************************************************/
void neorv32_aux_print_hw_version(uint32_t impid) {
uint32_t i;
char tmp, cnt;
uint32_t i = 0;
char tmp = 0, cnt = 0;
if (neorv32_uart0_available() != 0) { // cannot output anything if UART0 is not implemented
for (i=0; i<4; i++) {
@ -598,9 +603,9 @@ void neorv32_aux_print_logo(void) {
{0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0300, 0xc630}
};
unsigned int x, y, z;
uint16_t tmp;
char c;
unsigned int x = 0, y = 0, z = 0;
uint16_t tmp = 0;
char c = 0;
if (neorv32_uart0_available() != 0) { // cannot output anything if UART0 is not implemented
for (y=0; y<(sizeof(logo_c) / sizeof(logo_c[0])); y++) {

View file

@ -9,8 +9,6 @@
/**
* @file neorv32_clint.c
* @brief Hardware Local Interruptor (CLINT) HW driver source file.
*
* @see https://stnolting.github.io/neorv32/sw/files.html
*/
#include <neorv32.h>
@ -93,7 +91,7 @@ void neorv32_clint_time_set(uint64_t time) {
**************************************************************************/
uint64_t neorv32_clint_time_get(void) {
uint32_t tmp1, tmp2, tmp3;
uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
while(1) {
tmp1 = NEORV32_CLINT->MTIME.uint32[1];
tmp2 = NEORV32_CLINT->MTIME.uint32[0];

View file

@ -1,7 +1,7 @@
// ================================================================================ //
// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 //
// Copyright (c) NEORV32 contributors. //
// Copyright (c) 2020 - 2024 Stephan Nolting. All rights reserved. //
// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. //
// Licensed under the BSD-3-Clause license, see LICENSE for details. //
// SPDX-License-Identifier: BSD-3-Clause //
// ================================================================================ //
@ -9,8 +9,6 @@
/**
* @file neorv32_cpu.c
* @brief CPU Core Functions HW driver source file.
*
* @see https://stnolting.github.io/neorv32/sw/files.html
*/
#include <neorv32.h>
@ -45,9 +43,7 @@
**************************************************************************/
uint64_t neorv32_cpu_get_cycle(void) {
subwords64_t cycles;
uint32_t tmp1, tmp2, tmp3;
uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
while(1) {
tmp1 = neorv32_cpu_csr_read(CSR_CYCLEH);
tmp2 = neorv32_cpu_csr_read(CSR_CYCLE);
@ -57,6 +53,7 @@ uint64_t neorv32_cpu_get_cycle(void) {
}
}
subwords64_t cycles;
cycles.uint32[0] = tmp2;
cycles.uint32[1] = tmp3;
@ -72,7 +69,6 @@ uint64_t neorv32_cpu_get_cycle(void) {
void neorv32_cpu_set_mcycle(uint64_t value) {
subwords64_t cycles;
cycles.uint64 = value;
// prevent low-to-high carry while writing
@ -89,9 +85,7 @@ void neorv32_cpu_set_mcycle(uint64_t value) {
**************************************************************************/
uint64_t neorv32_cpu_get_instret(void) {
subwords64_t cycles;
uint32_t tmp1, tmp2, tmp3;
uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
while(1) {
tmp1 = neorv32_cpu_csr_read(CSR_INSTRETH);
tmp2 = neorv32_cpu_csr_read(CSR_INSTRET);
@ -101,6 +95,7 @@ uint64_t neorv32_cpu_get_instret(void) {
}
}
subwords64_t cycles;
cycles.uint32[0] = tmp2;
cycles.uint32[1] = tmp3;
@ -116,7 +111,6 @@ uint64_t neorv32_cpu_get_instret(void) {
void neorv32_cpu_set_minstret(uint64_t value) {
subwords64_t cycles;
cycles.uint64 = value;
// prevent low-to-high carry while writing
@ -144,9 +138,8 @@ void neorv32_cpu_delay_ms(uint32_t time_ms) {
// use CYCLE CSRs
// -------------------------------------------
if ( (neorv32_cpu_csr_read(CSR_MXISA) & (1<<CSR_MXISA_ZICNTR)) && // cycle counter available?
((neorv32_cpu_csr_read(CSR_MCOUNTINHIBIT) & (1<<CSR_MCOUNTINHIBIT_CY)) == 0) ) { // counter is running?
if ((neorv32_cpu_csr_read(CSR_MXISA) & (1<<CSR_MXISA_ZICNTR)) && // cycle counter available?
((neorv32_cpu_csr_read(CSR_MCOUNTINHIBIT) & (1<<CSR_MCOUNTINHIBIT_CY)) == 0)) { // counter is running?
tmp = neorv32_cpu_get_cycle() + wait_cycles;
while (neorv32_cpu_get_cycle() < tmp);
}
@ -154,7 +147,6 @@ void neorv32_cpu_delay_ms(uint32_t time_ms) {
// use MTIME machine timer
// -------------------------------------------
else if (NEORV32_SYSINFO->SOC & (1 << SYSINFO_SOC_IO_CLINT)) { // MTIMER available?
tmp = neorv32_clint_time_get() + wait_cycles;
while (neorv32_clint_time_get() < tmp);
}
@ -162,10 +154,8 @@ void neorv32_cpu_delay_ms(uint32_t time_ms) {
// simple loop as fall-back (imprecise!)
// -------------------------------------------
else {
const uint32_t loop_cycles_c = 16; // clock cycles per iteration of the ASM loop
uint32_t iterations = (uint32_t)(wait_cycles / loop_cycles_c);
asm volatile (" .balign 4 \n" // make sure this is 32-bit aligned
" __neorv32_cpu_delay_ms_start: \n"
" beq %[cnt_r], zero, __neorv32_cpu_delay_ms_end \n" // 3 cycles (not taken)
@ -408,7 +398,7 @@ uint32_t neorv32_cpu_hpm_get_num_counters(void) {
**************************************************************************/
uint32_t neorv32_cpu_hpm_get_size(void) {
uint32_t tmp, cnt;
uint32_t tmp = 0, cnt = 0;
// HPMs implemented at all?
if ((neorv32_cpu_csr_read(CSR_MXISA) & (1<<CSR_MXISA_ZIHPM)) == 0) {

View file

@ -9,8 +9,6 @@
/**
* @file neorv32_rte.c
* @brief NEORV32 Runtime Environment.
*
* @see https://stnolting.github.io/neorv32/sw/files.html
*/
#include <neorv32.h>
@ -155,7 +153,7 @@ void __attribute__((__naked__,aligned(4))) neorv32_rte_core(void) {
asm volatile ("fence");
// find according trap handler base address
uint32_t handler_base;
uint32_t handler_base = 0;
switch (neorv32_cpu_csr_read(CSR_MCAUSE)) {
case TRAP_CODE_I_ACCESS: handler_base = __neorv32_rte_vector_lut[RTE_TRAP_I_ACCESS]; break;
case TRAP_CODE_I_ILLEGAL: handler_base = __neorv32_rte_vector_lut[RTE_TRAP_I_ILLEGAL]; break;
@ -419,8 +417,8 @@ void neorv32_rte_debug_handler(void) {
**************************************************************************/
void __neorv32_rte_print_hex(uint32_t num, int digits) {
int i;
static const char hex_symbols[] = "0123456789ABCDEF";
int i = 0;
const char hex_symbols[] = "0123456789ABCDEF";
if (neorv32_uart0_available() != 0) { // cannot output anything if UART0 is not implemented
neorv32_uart0_putc('0');

View file

@ -1,7 +1,7 @@
// ================================================================================ //
// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 //
// Copyright (c) NEORV32 contributors. //
// Copyright (c) 2020 - 2024 Stephan Nolting. All rights reserved. //
// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. //
// Licensed under the BSD-3-Clause license, see LICENSE for details. //
// SPDX-License-Identifier: BSD-3-Clause //
// ================================================================================ //
@ -9,10 +9,6 @@
/**
* @file neorv32_trng.c
* @brief True Random Number Generator (TRNG) HW driver source file.
*
* @note These functions should only be used if the TRNG unit was synthesized (IO_TRNG_EN = true).
*
* @see https://stnolting.github.io/neorv32/sw/files.html
*/
#include <neorv32.h>
@ -42,7 +38,7 @@ void neorv32_trng_enable(void) {
NEORV32_TRNG->CTRL = 0; // disable and reset
// wait for all internal components to reset
int i;
int i = 0;
for (i=0; i<256; i++) {
asm volatile ("nop");
}

View file

@ -1,7 +1,7 @@
// ================================================================================ //
// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 //
// Copyright (c) NEORV32 contributors. //
// Copyright (c) 2020 - 2024 Stephan Nolting. All rights reserved. //
// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. //
// Licensed under the BSD-3-Clause license, see LICENSE for details. //
// SPDX-License-Identifier: BSD-3-Clause //
// ================================================================================ //
@ -9,10 +9,6 @@
/**
* @file neorv32_twi.c
* @brief Two-Wire Interface Controller (TWI) HW driver source file.
*
* @note These functions should only be used if the TWI unit was synthesized (IO_TWI_EN = true).
*
* @see https://stnolting.github.io/neorv32/sw/files.html
*/
#include <neorv32.h>
@ -161,8 +157,8 @@ int neorv32_twi_get(uint8_t *data) {
**************************************************************************/
int neorv32_twi_trans(uint8_t *data, int mack) {
uint8_t rx_data;
int device_ack;
uint8_t rx_data = 0;
int device_ack = 0;
while (NEORV32_TWI->CTRL & (1<<TWI_CTRL_TX_FULL)); // wait for free TX entry

View file

@ -48,10 +48,10 @@ int neorv32_uart_scan(neorv32_uart_t *UARTx, char *buffer, int max_size, int ec
**************************************************************************/
int neorv32_uart_available(neorv32_uart_t *UARTx) {
if ( ((uint32_t)UARTx == NEORV32_UART0_BASE) && (NEORV32_SYSINFO->SOC & (1 << SYSINFO_SOC_IO_UART0)) ) {
if (((uint32_t)UARTx == NEORV32_UART0_BASE) && (NEORV32_SYSINFO->SOC & (1 << SYSINFO_SOC_IO_UART0))) {
return 1;
}
else if ( ((uint32_t)UARTx == NEORV32_UART1_BASE) && (NEORV32_SYSINFO->SOC & (1 << SYSINFO_SOC_IO_UART1)) ) {
else if (((uint32_t)UARTx == NEORV32_UART1_BASE) && (NEORV32_SYSINFO->SOC & (1 << SYSINFO_SOC_IO_UART1))) {
return 1;
}
else {
@ -329,10 +329,15 @@ void neorv32_uart_puts(neorv32_uart_t *UARTx, const char *s) {
**************************************************************************/
void neorv32_uart_vprintf(neorv32_uart_t *UARTx, const char *format, va_list args) {
char c;
char string_buf[33];
int32_t n;
unsigned int tmp;
char c = 0;
char __attribute__((aligned(4))) string_buf[36]; // optimize stack layout
int32_t n = 0;
unsigned int tmp = 0;
// prevent uninitialized stack bytes
for (n=0; n<sizeof(string_buf); n++) {
string_buf[n] = 0;
}
while ((c = *format++)) {
if (c == '%') {
@ -377,7 +382,7 @@ void neorv32_uart_vprintf(neorv32_uart_t *UARTx, const char *format, va_list arg
neorv32_uart_putc(UARTx, c);
break;
default: // unsupported formating character
default: // unsupported formatting character
neorv32_uart_putc(UARTx, '%');
neorv32_uart_putc(UARTx, c);
break;