github-mirrors/neorv32
1
0
Fork 0
mirror of https://github.com/stnolting/neorv32.git synced 2025-04-23 21:57:33 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

added README to introduce the different top templates

Browse source
This commit is contained in:
stnolting 2020-07-09 14:13:36 +02:00
parent 4406132c5a
commit 674e8bef9e
1 changed files with 10 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

10
rtl/top_templates/README.md Normal file
View file

@ -0,0 +1,10 @@
## Top Templates
The top entity of the NEORV32 processor is `rtl/core/neorv32_top.vhd`. This folder provides additional
top entities, that instantiate the processor's top entity and have a different top interface.
### `neorv32_test_setup.vhd`
This entity is intended as "FPGA hello world" example for playing with the NEORV32. It uses only some of the
provided peripherals and provides a very simple and basic interface - only the clock, reset, UART and a subset
of the GPIO output port are propagated to the outer world.