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docs: add HTML datasheet
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umarcor
parent
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commit
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5 changed files with 130 additions and 83 deletions
13
.github/workflows/Documentation.yml
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13
.github/workflows/Documentation.yml
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@ -50,13 +50,24 @@ jobs:
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- name: '🧰 Repository Checkout'
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uses: actions/checkout@v2
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- name: '📚 Build HTML'
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uses: docker://asciidoctor/docker-asciidoctor
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with:
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args: asciidoctor docs/src_adoc/neorv32.adoc --out-file docs/index.html
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- name: '📚 Build PDF'
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uses: docker://asciidoctor/docker-asciidoctor
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with:
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args: asciidoctor-pdf -a pdf-theme=docs/src_adoc/neorv32-theme.yml docs/src_adoc/neorv32.adoc --out-file docs/NEORV32.pdf
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- name: '📤 Upload Artifact'
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- name: '📤 Upload Artifact: PDF'
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uses: actions/upload-artifact@v2
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with:
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name: NEORV32-PDF
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path: docs/NEORV32.pdf
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- name: '📤 Upload Artifact: HTML'
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uses: actions/upload-artifact@v2
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with:
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name: NEORV32-HTML
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path: docs/index.html
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3
.gitignore
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3
.gitignore
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@ -22,3 +22,6 @@ docs/doxygen_build
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# no compiled ghdl stuff
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*.cf
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# HTML datasheet
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/docs/index.html
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82
docs/src_adoc/content.adoc
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82
docs/src_adoc/content.adoc
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@ -0,0 +1,82 @@
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<<<
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// ####################################################################################################################
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:sectnums!:
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== Proprietary and Legal Notice
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* "GitHub" is a Subsidiary of Microsoft Corporation.
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* "Vivado" and "Artix" are trademarks of Xilinx Inc.
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* "AXI" and "AXI4-Lite" are trademarks of Arm Holdings plc.
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* "ModelSim" is a trademark of Mentor Graphics – A Siemens Business.
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* "Quartus Prime" and "Cyclone" are trademarks of Intel Corporation.
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* "iCE40", "UltraPlus" and "Radiant" are trademarks of Lattice Semiconductor Corporation.
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* "Windows" is a trademark of Microsoft Corporation.
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* "Tera Term" copyright by T. Teranishi.
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* Timing diagrams made with WaveDrom Editor.
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* "NeoPixel" is a trademark of Adafruit Industries.
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Icons from https://www.flaticon.com and made by
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link:https://www.freepik.com[Freepik], link:https://www.flaticon.com/authors/good-ware[Good Ware],
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link:https://www.flaticon.com/authors/pixel-perfect[Pixel perfect], link:https://www.flaticon.com/authors/vectors-market[Vectors Market]
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**Limitation of Liability for External Links**
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This document contains links to the websites of third parties ("external links"). As the content of these websites
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is not under our control, we cannot assume any liability for such external content. In all cases, the provider of
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information of the linked websites is liable for the content and accuracy of the information provided. At the
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point in time when the links were placed, no infringements of the law were recognizable to us. As soon as an
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infringement of the law becomes known to us, we will immediately remove the link in question.
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**Disclaimer**
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This project is released under the BSD 3-Clause license. No copyright infringement
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intended. Other implied or used projects might have different licensing – see their documentation to get more information.
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<<<
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:sectnums!:
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== BSD 3-Clause License
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Copyright (c) 2021, Stephan Nolting. All rights reserved.
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Redistribution and use in source and binary forms, with or without modification, are permitted provided that
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the following conditions are met:
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. Redistributions of source code must retain the above copyright notice, this list of conditions and the
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following disclaimer.
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. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
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the following disclaimer in the documentation and/or other materials provided with the distribution.
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. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or
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promote products derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF
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==========================
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**The NEORV32 Processor Project** +
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Copyright (c) 2021, by Dipl.-Ing. Stephan Nolting. All rights reserved. +
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HQ: https://github.com/stnolting/neorv32 +
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Contact: stnolting@gmail.com +
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_made in Hanover, Germany_
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==========================
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// ####################################################################################################################
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include::overview.adoc[]
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include::cpu.adoc[]
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include::soc.adoc[]
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include::software.adoc[]
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include::getting_started.adoc[]
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32
docs/src_adoc/index.adoc
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32
docs/src_adoc/index.adoc
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@ -0,0 +1,32 @@
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= The NEORV32 RISC-V Processor
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:author: Dipl.-Ing. Stephan Nolting
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:email: stnolting@gmail.com
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:description: A size-optimized, customizable and open-source full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.
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:revnumber: v1.5.5.1
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:doctype: book
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:sectnums:
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:icons: font
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:stem:
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:reproducible:
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:listing-caption: Listing
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:toc: left
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:toclevels: 4
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:title-logo-image: image:../figures/neorv32_logo_dark.png[pdfwidth=6.25in,align=center]
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// Uncomment next line to add a title page (or set doctype to book)
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//:title-page:
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// Uncomment next line to set page size (default is A4)
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//:pdf-page-size: Letter
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<<<
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// ####################################################################################################################
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.**Project is STABLE - even if work is in progress**
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[TIP]
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This project is under active development. Best care is taken to keep the project stable while working on new features. The whole processors is checked
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before updates are pushed to the repository and even more tests are made before publishing new releases. +
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+
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New features that are _work-in-progress_ - like new CPU extension - are disabled by default (and should not be enabled for normal usage). Like any other
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disabled features, these work-in-progress components will not be synthesized at all when disabled and **do not** increase area and power requirements
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and **do not** impact overall timing and performance.
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include::content.adoc[]
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@ -36,85 +36,4 @@ and **do not** impact overall timing and performance.
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toc::[]
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<<<
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// ####################################################################################################################
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:sectnums!:
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== Proprietary and Legal Notice
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* "GitHub" is a Subsidiary of Microsoft Corporation.
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* "Vivado" and "Artix" are trademarks of Xilinx Inc.
|
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* "AXI" and "AXI4-Lite" are trademarks of Arm Holdings plc.
|
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* "ModelSim" is a trademark of Mentor Graphics – A Siemens Business.
|
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* "Quartus Prime" and "Cyclone" are trademarks of Intel Corporation.
|
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* "iCE40", "UltraPlus" and "Radiant" are trademarks of Lattice Semiconductor Corporation.
|
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* "Windows" is a trademark of Microsoft Corporation.
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* "Tera Term" copyright by T. Teranishi.
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* Timing diagrams made with WaveDrom Editor.
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* "NeoPixel" is a trademark of Adafruit Industries.
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Icons from https://www.flaticon.com and made by
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link:https://www.freepik.com[Freepik], link:https://www.flaticon.com/authors/good-ware[Good Ware],
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link:https://www.flaticon.com/authors/pixel-perfect[Pixel perfect], link:https://www.flaticon.com/authors/vectors-market[Vectors Market]
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**Limitation of Liability for External Links**
|
||||
|
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This document contains links to the websites of third parties ("external links"). As the content of these websites
|
||||
is not under our control, we cannot assume any liability for such external content. In all cases, the provider of
|
||||
information of the linked websites is liable for the content and accuracy of the information provided. At the
|
||||
point in time when the links were placed, no infringements of the law were recognizable to us. As soon as an
|
||||
infringement of the law becomes known to us, we will immediately remove the link in question.
|
||||
|
||||
**Disclaimer**
|
||||
|
||||
This project is released under the BSD 3-Clause license. No copyright infringement
|
||||
intended. Other implied or used projects might have different licensing – see their documentation to get more information.
|
||||
|
||||
|
||||
<<<
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:sectnums!:
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== BSD 3-Clause License
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||||
Copyright (c) 2021, Stephan Nolting. All rights reserved.
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Redistribution and use in source and binary forms, with or without modification, are permitted provided that
|
||||
the following conditions are met:
|
||||
|
||||
. Redistributions of source code must retain the above copyright notice, this list of conditions and the
|
||||
following disclaimer.
|
||||
. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
|
||||
the following disclaimer in the documentation and/or other materials provided with the distribution.
|
||||
. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or
|
||||
promote products derived from this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
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ARISING IN ANY WAY OUT OF
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|
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==========================
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**The NEORV32 Processor Project** +
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Copyright (c) 2021, by Dipl.-Ing. Stephan Nolting. All rights reserved. +
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HQ: https://github.com/stnolting/neorv32 +
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Contact: stnolting@gmail.com +
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_made in Hanover, Germany_
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==========================
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// ####################################################################################################################
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include::overview.adoc[]
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include::cpu.adoc[]
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include::soc.adoc[]
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include::software.adoc[]
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include::getting_started.adoc[]
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include::content.adoc[]
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|
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